From patchwork Mon Oct 2 12:00:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 147271 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2a8e:b0:403:3b70:6f57 with SMTP id in14csp1393275vqb; Mon, 2 Oct 2023 05:34:11 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFJIa1WccDEzN1SPwrHMBO33JkUJBJG6g8j9XN5UPS5nWUwtPzF43/bi9/jHjItwUVGuYDd X-Received: by 2002:a05:6a20:9385:b0:15a:13f3:49ca with SMTP id x5-20020a056a20938500b0015a13f349camr14806231pzh.9.1696250051497; Mon, 02 Oct 2023 05:34:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696250051; cv=none; d=google.com; s=arc-20160816; b=gFalsbvDkcmjH9GwF4YWamyvFWc1MteKuaJCy+zTd59ocr6d5R8exwEQpLKC4cUnXo Ox4YwLuYMMxB657LE1b1kBCWDSPiW6DUfKaaFyZyNjNh/3pOT1wiVp4fBvV2xzfBcqJh G4LdNbTm+ogS9M0HRRl6qBpybeJwALe9xEmLw8M+bwLak9wUDOj04WhhWtZ9yQs5oZ0n NixJLRVOUV3GGXhmDaOGx6MyGLTtxrarP+rWF2E7W8AUKidLsi1HtMYe8ZiCpBLj9iQe Lou73pW0Ze5hO7fT6xt/pshBKFj1EFIagczd6ukn3fQecz/Tab0wDorX+Z9gNEdzAoGU fytQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:date:mime-version:references:subject:cc:to:from :dkim-signature:dkim-signature:message-id; bh=5EsTuHLRMt+mh9/+wwjfJDEI240zRMwQu4qtcC7nL1o=; fh=u57tXYamzTrJA+Ht8n1u7SfTMptrQaIb6LVW+jsaYf4=; b=nlozPnblPBWgM1jRJTCx1ZBT1u0xLir6UMTpkXdToTUh0iajCS0tIq/SK02whG10z2 Xj4baz0KOrX6ECJdfmWv9Y2mz9JMMLjpuKcYw3HrndAUdoo7RDJHl0O1nLpJSTZ3W9CJ euVh41o+eai3/IePmdgQt3MdxP4YVTZamCgormF5KHIvMzS2BIl70HI1FxzkMTDFjZmL dbqWOc9L5gBRvvOS++q2xffY3s02fHJGa2o5tohR6cOdzORQujKMW//CEbXgKlZlhGE1 mdU99soLiRJgj8OYzCAEse/mKs8k6gScADrXrM2f+Vgut0+6V9VUC69UnVOFfBXZGH3S JJfQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="qd/2H/aF"; dkim=neutral (no key) header.i=@linutronix.de header.b="ryCH/3Xg"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from agentk.vger.email (agentk.vger.email. [2620:137:e000::3:2]) by mx.google.com with ESMTPS id j191-20020a6380c8000000b00573ff1f360bsi27336661pgd.479.2023.10.02.05.34.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Oct 2023 05:34:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="qd/2H/aF"; dkim=neutral (no key) header.i=@linutronix.de header.b="ryCH/3Xg"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id D7A7A8056995; Mon, 2 Oct 2023 05:01:36 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237029AbjJBMBE (ORCPT + 18 others); Mon, 2 Oct 2023 08:01:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47300 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236913AbjJBMA1 (ORCPT ); Mon, 2 Oct 2023 08:00:27 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6006310DF for ; Mon, 2 Oct 2023 05:00:09 -0700 (PDT) Message-ID: <20231002115903.603100036@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1696248007; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=5EsTuHLRMt+mh9/+wwjfJDEI240zRMwQu4qtcC7nL1o=; b=qd/2H/aFUJYfk8KibD6cLXHb5wEHvYX+MnYSKe/WS5NDDePcCyAY4LHkPjB7Z3vOc4ZLEe YwL3e61xl1Io+zXV4c49mtYPSCSgPsTKs1OgsieKcendVlcG8I8M/TA1orXwYltxMWbbPr dcRxzQkwCGV2bcOrGiQTOtynWbU9OwkziUh1P1tytFqDsoqGuwdBVgXyEkl08CLgUm6PsE fXFmmlN4GbmwpGEa0VvCNE1Fv8EaNGGNAIAWJrSnbbTU5vDxCBzySCoChTXy7nm+2JSGAz 6MAwQa2ZoJkdTRk6DJnotYdh4LEQNSURjVJFthThMzmhJijKhNs9W+/vVq8YAw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1696248007; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=5EsTuHLRMt+mh9/+wwjfJDEI240zRMwQu4qtcC7nL1o=; b=ryCH/3XgkECu6G8UUOUuZ1zNz5hXCqWApEXN64Zbqbbn/wJywPUDwPctd4dIXEEB4fqprk bINwDxRREKmPcBCw== From: Thomas Gleixner To: LKML Cc: x86@kernel.org, Borislav Petkov , "Chang S. Bae" , Arjan van de Ven , Nikolay Borisov Subject: [patch V4 27/30] x86/apic: Provide apic_force_nmi_on_cpu() References: <20231002115506.217091296@linutronix.de> MIME-Version: 1.0 Date: Mon, 2 Oct 2023 14:00:07 +0200 (CEST) X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Mon, 02 Oct 2023 05:01:36 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778647093604779153 X-GMAIL-MSGID: 1778647093604779153 From: Thomas Gleixner When SMT siblings are soft-offlined and parked in one of the play_dead() variants they still react on NMI, which is problematic on affected Intel CPUs. The default play_dead() variant uses MWAIT on modern CPUs, which is not guaranteed to be safe when updated concurrently. Right now late loading is prevented when not all SMT siblings are online, but as they still react on NMI, it is possible to bring them out of their park position into a trivial rendevouz handler. Provide a function which allows to do that. I does sanity checks whether the target is in the cpus_booted_once_mask and whether the APIC driver supports it. Mark X2APIC and XAPIC as capable, but exclude 32bit and the UV and NUMACHIP variants as that needs feedback from the relevant experts. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/apic.h | 5 ++++- arch/x86/kernel/apic/apic_flat_64.c | 2 ++ arch/x86/kernel/apic/ipi.c | 8 ++++++++ arch/x86/kernel/apic/x2apic_cluster.c | 1 + arch/x86/kernel/apic/x2apic_phys.c | 1 + 5 files changed, 16 insertions(+), 1 deletion(-) --- --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -276,7 +276,8 @@ struct apic { u32 disable_esr : 1, dest_mode_logical : 1, - x2apic_set_max_apicid : 1; + x2apic_set_max_apicid : 1, + nmi_to_offline_cpu : 1; u32 (*calc_dest_apicid)(unsigned int cpu); @@ -542,6 +543,8 @@ extern bool default_check_apicid_used(ph extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap); extern int default_cpu_present_to_apicid(int mps_cpu); +void apic_send_nmi_to_offline_cpu(unsigned int cpu); + #else /* CONFIG_X86_LOCAL_APIC */ static inline unsigned int read_apic_id(void) { return 0; } --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -103,6 +103,7 @@ static struct apic apic_flat __ro_after_ .send_IPI_allbutself = default_send_IPI_allbutself, .send_IPI_all = default_send_IPI_all, .send_IPI_self = default_send_IPI_self, + .nmi_to_offline_cpu = true, .read = native_apic_mem_read, .write = native_apic_mem_write, @@ -175,6 +176,7 @@ static struct apic apic_physflat __ro_af .send_IPI_allbutself = default_send_IPI_allbutself, .send_IPI_all = default_send_IPI_all, .send_IPI_self = default_send_IPI_self, + .nmi_to_offline_cpu = true, .read = native_apic_mem_read, .write = native_apic_mem_write, --- a/arch/x86/kernel/apic/ipi.c +++ b/arch/x86/kernel/apic/ipi.c @@ -97,6 +97,14 @@ void native_send_call_func_ipi(const str __apic_send_IPI_mask(mask, CALL_FUNCTION_VECTOR); } +void apic_send_nmi_to_offline_cpu(unsigned int cpu) +{ + if (WARN_ON_ONCE(!apic->nmi_to_offline_cpu)) + return; + if (WARN_ON_ONCE(!cpumask_test_cpu(cpu, &cpus_booted_once_mask))) + return; + apic->send_IPI(cpu, NMI_VECTOR); +} #endif /* CONFIG_SMP */ static inline int __prepare_ICR2(unsigned int mask) --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -251,6 +251,7 @@ static struct apic apic_x2apic_cluster _ .send_IPI_allbutself = x2apic_send_IPI_allbutself, .send_IPI_all = x2apic_send_IPI_all, .send_IPI_self = x2apic_send_IPI_self, + .nmi_to_offline_cpu = true, .read = native_apic_msr_read, .write = native_apic_msr_write, --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -166,6 +166,7 @@ static struct apic apic_x2apic_phys __ro .send_IPI_allbutself = x2apic_send_IPI_allbutself, .send_IPI_all = x2apic_send_IPI_all, .send_IPI_self = x2apic_send_IPI_self, + .nmi_to_offline_cpu = true, .read = native_apic_msr_read, .write = native_apic_msr_write,