Message ID | 20230930102218.229613-2-robimarko@gmail.com |
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State | New |
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[88.207.96.216]) by smtp.googlemail.com with ESMTPSA id j25-20020a170906255900b0099bcf1c07c6sm13716547ejb.138.2023.09.30.03.22.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Sep 2023 03:22:22 -0700 (PDT) From: Robert Marko <robimarko@gmail.com> To: ilia.lin@kernel.org, vireshk@kernel.org, nm@ti.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, rafael@kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: Christian Marangi <ansuelsmth@gmail.com>, Robert Marko <robimarko@gmail.com> Subject: [PATCH v5 2/4] dt-bindings: opp: opp-v2-kryo-cpu: Document named opp-microvolt property Date: Sat, 30 Sep 2023 12:21:17 +0200 Message-ID: <20230930102218.229613-2-robimarko@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230930102218.229613-1-robimarko@gmail.com> References: <20230930102218.229613-1-robimarko@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Sat, 30 Sep 2023 03:24:26 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778480210908874567 X-GMAIL-MSGID: 1778480210908874567 |
Series |
[v5,1/4] cpufreq: qcom-nvmem: add support for IPQ8074
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Commit Message
Robert Marko
Sept. 30, 2023, 10:21 a.m. UTC
From: Christian Marangi <ansuelsmth@gmail.com> Document named opp-microvolt property for opp-v2-kryo-cpu schema. This property is used to declare multiple voltage ranges selected on the different values read from efuses. The selection is done based on the speed pvs values and the named opp-microvolt property is selected by the qcom-cpufreq-nvmem driver. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Robert Marko <robimarko@gmail.com> --- Changes v5: * Fix typo in opp items Changes v4: * Address comments from Rob (meaning of pvs, drop of driver specific info, drop of legacy single voltage OPP, better specify max regulators supported) .../bindings/opp/opp-v2-kryo-cpu.yaml | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+)
Comments
On Sat, 30 Sep 2023 12:21:17 +0200, Robert Marko wrote: > From: Christian Marangi <ansuelsmth@gmail.com> > > Document named opp-microvolt property for opp-v2-kryo-cpu schema. > This property is used to declare multiple voltage ranges selected on the > different values read from efuses. The selection is done based on the > speed pvs values and the named opp-microvolt property is selected by the > qcom-cpufreq-nvmem driver. > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> > Signed-off-by: Robert Marko <robimarko@gmail.com> > --- > Changes v5: > * Fix typo in opp items > > Changes v4: > * Address comments from Rob (meaning of pvs, drop of > driver specific info, drop of legacy single voltage OPP, > better specify max regulators supported) > > .../bindings/opp/opp-v2-kryo-cpu.yaml | 39 +++++++++++++++++++ > 1 file changed, 39 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
On Sat, 30 Sept 2023 at 13:22, Robert Marko <robimarko@gmail.com> wrote: > > From: Christian Marangi <ansuelsmth@gmail.com> > > Document named opp-microvolt property for opp-v2-kryo-cpu schema. > This property is used to declare multiple voltage ranges selected on the > different values read from efuses. The selection is done based on the > speed pvs values and the named opp-microvolt property is selected by the > qcom-cpufreq-nvmem driver. > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> > Signed-off-by: Robert Marko <robimarko@gmail.com> > --- > Changes v5: > * Fix typo in opp items > > Changes v4: > * Address comments from Rob (meaning of pvs, drop of > driver specific info, drop of legacy single voltage OPP, > better specify max regulators supported) > > .../bindings/opp/opp-v2-kryo-cpu.yaml | 39 +++++++++++++++++++ > 1 file changed, 39 insertions(+) > > diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml > index 27ea7eca73e5..8d2a47e9a854 100644 > --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml > +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml > @@ -65,6 +65,12 @@ patternProperties: > 5: MSM8996SG, speedbin 1 > 6: MSM8996SG, speedbin 2 > 7-31: unused > + > + Bitmap for IPQ806X SoC: > + 0: IPQ8062 > + 1: IPQ8064/IPQ8066/IPQ8068 > + 2: IPQ8065/IPQ8069 > + 3-31: unused > enum: [0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, > 0x9, 0xd, 0xe, 0xf, > 0x10, 0x20, 0x30, 0x70] > @@ -73,6 +79,23 @@ patternProperties: > > required-opps: true > > + patternProperties: > + '^opp-microvolt-speed[0-9]+-pvs[0-9]+$': > + description: | > + Named opp-microvolt property following the same generic > + binding for named opp-microvolt. > + > + The correct voltage range is selected based on the values > + in the efuse for the speed and the pvs (power variable > + scaling). I suppose that simple 'true' schema should be enough since this is already mostly described in opp/opp-v2-base.yaml > + minItems: 1 > + maxItems: 4 # Up to 4 regulators: Core, Mem, Dig and HFPLL > + items: > + items: > + - description: nominal voltage > + - description: minimum voltage > + - description: maximum voltage > + > required: > - opp-hz > > @@ -258,6 +281,22 @@ examples: > }; > }; > > + /* Dummy opp table to give example for named opp-microvolt */ > + opp-table-2 { > + compatible = "operating-points-v2-kryo-cpu"; > + nvmem-cells = <&speedbin_efuse>; > + > + opp-384000000 { > + opp-hz = /bits/ 64 <384000000>; > + opp-microvolt-speed0-pvs0 = <1000000 950000 1050000>; > + opp-microvolt-speed0-pvs1 = <925000 878750 971250>; > + opp-microvolt-speed0-pvs2 = <875000 831250 918750>; > + opp-microvolt-speed0-pvs3 = <800000 760000 840000>; > + opp-supported-hw = <0x7>; > + clock-latency-ns = <100000>; > + }; > + }; > + > smem { > compatible = "qcom,smem"; > memory-region = <&smem_mem>; > -- > 2.41.0 >
On Mon, Oct 02, 2023 at 10:07:44PM +0300, Dmitry Baryshkov wrote: > On Sat, 30 Sept 2023 at 13:22, Robert Marko <robimarko@gmail.com> wrote: > > > > From: Christian Marangi <ansuelsmth@gmail.com> > > > > Document named opp-microvolt property for opp-v2-kryo-cpu schema. > > This property is used to declare multiple voltage ranges selected on the > > different values read from efuses. The selection is done based on the > > speed pvs values and the named opp-microvolt property is selected by the > > qcom-cpufreq-nvmem driver. > > > > Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> > > Signed-off-by: Robert Marko <robimarko@gmail.com> > > --- > > Changes v5: > > * Fix typo in opp items > > > > Changes v4: > > * Address comments from Rob (meaning of pvs, drop of > > driver specific info, drop of legacy single voltage OPP, > > better specify max regulators supported) > > > > .../bindings/opp/opp-v2-kryo-cpu.yaml | 39 +++++++++++++++++++ > > 1 file changed, 39 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml > > index 27ea7eca73e5..8d2a47e9a854 100644 > > --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml > > +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml > > @@ -65,6 +65,12 @@ patternProperties: > > 5: MSM8996SG, speedbin 1 > > 6: MSM8996SG, speedbin 2 > > 7-31: unused > > + > > + Bitmap for IPQ806X SoC: > > + 0: IPQ8062 > > + 1: IPQ8064/IPQ8066/IPQ8068 > > + 2: IPQ8065/IPQ8069 > > + 3-31: unused > > enum: [0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, > > 0x9, 0xd, 0xe, 0xf, > > 0x10, 0x20, 0x30, 0x70] > > @@ -73,6 +79,23 @@ patternProperties: > > > > required-opps: true > > > > + patternProperties: > > + '^opp-microvolt-speed[0-9]+-pvs[0-9]+$': > > + description: | > > + Named opp-microvolt property following the same generic > > + binding for named opp-microvolt. > > + > > + The correct voltage range is selected based on the values > > + in the efuse for the speed and the pvs (power variable > > + scaling). > > I suppose that simple 'true' schema should be enough since this is > already mostly described in opp/opp-v2-base.yaml > Mhhh an example of the following implementation? > > + minItems: 1 > > + maxItems: 4 # Up to 4 regulators: Core, Mem, Dig and HFPLL > > + items: > > + items: > > + - description: nominal voltage > > + - description: minimum voltage > > + - description: maximum voltage > > + > > required: > > - opp-hz > > > > @@ -258,6 +281,22 @@ examples: > > }; > > }; > > > > + /* Dummy opp table to give example for named opp-microvolt */ > > + opp-table-2 { > > + compatible = "operating-points-v2-kryo-cpu"; > > + nvmem-cells = <&speedbin_efuse>; > > + > > + opp-384000000 { > > + opp-hz = /bits/ 64 <384000000>; > > + opp-microvolt-speed0-pvs0 = <1000000 950000 1050000>; > > + opp-microvolt-speed0-pvs1 = <925000 878750 971250>; > > + opp-microvolt-speed0-pvs2 = <875000 831250 918750>; > > + opp-microvolt-speed0-pvs3 = <800000 760000 840000>; > > + opp-supported-hw = <0x7>; > > + clock-latency-ns = <100000>; > > + }; > > + }; > > + > > smem { > > compatible = "qcom,smem"; > > memory-region = <&smem_mem>; > > -- > > 2.41.0 > > > > > -- > With best wishes > Dmitry
On 02-10-23, 21:10, Christian Marangi wrote: > On Mon, Oct 02, 2023 at 10:07:44PM +0300, Dmitry Baryshkov wrote: > > On Sat, 30 Sept 2023 at 13:22, Robert Marko <robimarko@gmail.com> wrote: > > I suppose that simple 'true' schema should be enough since this is > > already mostly described in opp/opp-v2-base.yaml > > > > Mhhh an example of the following implementation? Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml
On 02-10-23, 22:07, Dmitry Baryshkov wrote: > I suppose that simple 'true' schema should be enough since this is > already mostly described in opp/opp-v2-base.yaml Dmitry, Konrad, Can you guys review the other patches in the series, since you are also actively working on this driver ?
diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml index 27ea7eca73e5..8d2a47e9a854 100644 --- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml +++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml @@ -65,6 +65,12 @@ patternProperties: 5: MSM8996SG, speedbin 1 6: MSM8996SG, speedbin 2 7-31: unused + + Bitmap for IPQ806X SoC: + 0: IPQ8062 + 1: IPQ8064/IPQ8066/IPQ8068 + 2: IPQ8065/IPQ8069 + 3-31: unused enum: [0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x9, 0xd, 0xe, 0xf, 0x10, 0x20, 0x30, 0x70] @@ -73,6 +79,23 @@ patternProperties: required-opps: true + patternProperties: + '^opp-microvolt-speed[0-9]+-pvs[0-9]+$': + description: | + Named opp-microvolt property following the same generic + binding for named opp-microvolt. + + The correct voltage range is selected based on the values + in the efuse for the speed and the pvs (power variable + scaling). + minItems: 1 + maxItems: 4 # Up to 4 regulators: Core, Mem, Dig and HFPLL + items: + items: + - description: nominal voltage + - description: minimum voltage + - description: maximum voltage + required: - opp-hz @@ -258,6 +281,22 @@ examples: }; }; + /* Dummy opp table to give example for named opp-microvolt */ + opp-table-2 { + compatible = "operating-points-v2-kryo-cpu"; + nvmem-cells = <&speedbin_efuse>; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + opp-microvolt-speed0-pvs0 = <1000000 950000 1050000>; + opp-microvolt-speed0-pvs1 = <925000 878750 971250>; + opp-microvolt-speed0-pvs2 = <875000 831250 918750>; + opp-microvolt-speed0-pvs3 = <800000 760000 840000>; + opp-supported-hw = <0x7>; + clock-latency-ns = <100000>; + }; + }; + smem { compatible = "qcom,smem"; memory-region = <&smem_mem>;