diff mbox series

[2/2] arm64: dts: qcom: ipq8074: pass QMP PCI PHY PIPE clocks to GCC

Message ID 20230928211620.1278054-2-robimarko@gmail.com
State New
Headers
Series [1/2] dt-bindings: clocks: qcom,gcc-ipq8074: allow QMP PCI PHY PIPE clocks |

Commit Message

Robert Marko Sept. 28, 2023, 9:15 p.m. UTC 
  Pass QMP PCI PHY PIPE clocks to the GCC controller so it does not have to
find them by matching globaly by name.

If not passed directly, driver maintains backwards compatibility by then
falling back to global lookup.

Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Konrad Dybcio Sept. 29, 2023, 2:30 p.m. UTC | #1 
On 28.09.2023 23:15, Robert Marko wrote:
> Pass QMP PCI PHY PIPE clocks to the GCC controller so it does not have to
> find them by matching globaly by name.
> 
> If not passed directly, driver maintains backwards compatibility by then
> falling back to global lookup.
> 
> Signed-off-by: Robert Marko <robimarko@gmail.com>
> ---
>  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> index 643b586c0dec..1f108ee2e8ba 100644
> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> @@ -407,8 +407,8 @@ qpic_pins: qpic-state {
>  		gcc: gcc@1800000 {
>  			compatible = "qcom,gcc-ipq8074";
>  			reg = <0x01800000 0x80000>;
> -			clocks = <&xo>, <&sleep_clk>;
> -			clock-names = "xo", "sleep_clk";
> +			clocks = <&xo>, <&sleep_clk>, <&pcie_qmp0>, <&pcie_qmp1>;
> +			clock-names = "xo", "sleep_clk", "pcie0_pipe", "pcie1_pipe";
Can you turn this to one-per-line?

Konrad
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 643b586c0dec..1f108ee2e8ba 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -407,8 +407,8 @@  qpic_pins: qpic-state {
 		gcc: gcc@1800000 {
 			compatible = "qcom,gcc-ipq8074";
 			reg = <0x01800000 0x80000>;
-			clocks = <&xo>, <&sleep_clk>;
-			clock-names = "xo", "sleep_clk";
+			clocks = <&xo>, <&sleep_clk>, <&pcie_qmp0>, <&pcie_qmp1>;
+			clock-names = "xo", "sleep_clk", "pcie0_pipe", "pcie1_pipe";
 			#clock-cells = <1>;
 			#power-domain-cells = <1>;
 			#reset-cells = <1>;