[v2] arm64: dts: imx8mm-venice-gw73xx: add TPM device

Message ID 20230928201328.1945960-1-tharvey@gateworks.com
State New
Headers
Series [v2] arm64: dts: imx8mm-venice-gw73xx: add TPM device |

Commit Message

Tim Harvey Sept. 28, 2023, 8:13 p.m. UTC
  Add the TPM device found on the GW73xx revision F PCB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
v2: removed uncessary properties
---
 .../arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)
  

Comments

Shawn Guo Oct. 10, 2023, 1:27 a.m. UTC | #1
On Thu, Sep 28, 2023 at 01:13:28PM -0700, Tim Harvey wrote:
> Add the TPM device found on the GW73xx revision F PCB.
> 
> Signed-off-by: Tim Harvey <tharvey@gateworks.com>

Applied, thanks!
  

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
index 4f859d0fec69..d79fe9f62b95 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
@@ -104,8 +104,15 @@  reg_wifi_en: regulator-wifi-en {
 &ecspi2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_spi2>;
-	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
+		   <&gpio1 10 GPIO_ACTIVE_LOW>;
 	status = "okay";
+
+	tpm@1 {
+		compatible = "tcg,tpm_tis-spi";
+		reg = <0x1>;
+		spi-max-frequency = <36000000>;
+	};
 };
 
 &gpio1 {
@@ -361,6 +368,7 @@  MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK	0xd6
 			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI	0xd6
 			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO	0xd6
 			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13	0xd6
+			MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10	0xd6
 		>;
 	};