Message ID | 20230928151512.322016-4-christophe.roullier@foss.st.com |
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State | New |
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Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Richard Cochran <richardcochran@gmail.com>, Jose Abreu <joabreu@synopsys.com>, Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>, Christophe Roullier <christophe.roullier@foss.st.com> CC: <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v3 03/12] dt-bindings: net: add phy-supply property for stm32 Date: Thu, 28 Sep 2023 17:15:03 +0200 Message-ID: <20230928151512.322016-4-christophe.roullier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230928151512.322016-1-christophe.roullier@foss.st.com> References: <20230928151512.322016-1-christophe.roullier@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.201.21.249] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-28_14,2023-09-28_02,2023-05-22_02 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Thu, 28 Sep 2023 08:16:27 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778300194243155346 X-GMAIL-MSGID: 1778300194243155346 |
Series |
Series to deliver Ethernets for STM32MP13
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Commit Message
Christophe Roullier
Sept. 28, 2023, 3:15 p.m. UTC
Phandle to a regulator that provides power to the PHY. This
regulator will be managed during the PHY power on/off sequence.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
---
Documentation/devicetree/bindings/net/stm32-dwmac.yaml | 3 +++
1 file changed, 3 insertions(+)
Comments
On Thu, Sep 28, 2023 at 05:15:03PM +0200, Christophe Roullier wrote: > Phandle to a regulator that provides power to the PHY. This > regulator will be managed during the PHY power on/off sequence. > > Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Tjanks, Conor. > --- > Documentation/devicetree/bindings/net/stm32-dwmac.yaml | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml > index 67840cab02d2d..8114c325a4eed 100644 > --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml > +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml > @@ -78,6 +78,9 @@ properties: > encompases the glue register, the offset of the control register and > the mask to set bitfield in control register > > + phy-supply: > + description: PHY regulator > + > st,ext-phyclk: > description: > set this property in RMII mode when you have PHY without crystal 50MHz and want to > -- > 2.25.1 >
diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml index 67840cab02d2d..8114c325a4eed 100644 --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml @@ -78,6 +78,9 @@ properties: encompases the glue register, the offset of the control register and the mask to set bitfield in control register + phy-supply: + description: PHY regulator + st,ext-phyclk: description: set this property in RMII mode when you have PHY without crystal 50MHz and want to