[v3,02/12] dt-bindings: net: add new property st,ext-phyclk in documentation for stm32
Message ID | 20230928151512.322016-3-christophe.roullier@foss.st.com |
---|---|
State | New |
Headers |
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Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Richard Cochran <richardcochran@gmail.com>, Jose Abreu <joabreu@synopsys.com>, Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>, Christophe Roullier <christophe.roullier@foss.st.com> CC: <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v3 02/12] dt-bindings: net: add new property st,ext-phyclk in documentation for stm32 Date: Thu, 28 Sep 2023 17:15:02 +0200 Message-ID: <20230928151512.322016-3-christophe.roullier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230928151512.322016-1-christophe.roullier@foss.st.com> References: <20230928151512.322016-1-christophe.roullier@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.201.21.249] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-28_14,2023-09-28_02,2023-05-22_02 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Thu, 28 Sep 2023 08:16:22 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778307070393301899 X-GMAIL-MSGID: 1778330345368637759 |
Series |
Series to deliver Ethernets for STM32MP13
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Commit Message
Christophe Roullier
Sept. 28, 2023, 3:15 p.m. UTC
Add property st,ext-phyclk to manage cases when PHY have no cristal/quartz
This property can be used with RMII phy without cristal 50Mhz and when we
want to select RCC clock instead of ETH_REF_CLK
Can be used also with RGMII phy with no cristal and we select RCC clock
instead of ETH_CLK125
This new property replace st,eth-clk-sel and st,eth-ref-clk-sel
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
---
Documentation/devicetree/bindings/net/stm32-dwmac.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
Comments
On 9/28/23 19:17, Conor Dooley wrote: > On Thu, Sep 28, 2023 at 05:15:02PM +0200, Christophe Roullier wrote: >> Add property st,ext-phyclk to manage cases when PHY have no cristal/quartz >> This property can be used with RMII phy without cristal 50Mhz and when we >> want to select RCC clock instead of ETH_REF_CLK >> Can be used also with RGMII phy with no cristal and we select RCC clock >> instead of ETH_CLK125 >> This new property replace st,eth-clk-sel and st,eth-ref-clk-sel > I don't really see a response to Rob's comment on v2, either here or in > a reply to his email on v2: > | Certainly 1 property is better than 2 for me, but carrying 3 is not > | great. I don't understand why the we need a new property. What can't be > | supported with the existing properties? > > A sentence saying explaining exactly what the old properties do not > support that this one does, would be very helpful. > > Thanks, > Conor. I understand your remarks, the goal of the new property is to be more simple for customers/users with old properties we have lots of support to explain which one to use in which cases, now only one property to use (regardless of mode) Thanks, Christophe. >> Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com> >> --- >> Documentation/devicetree/bindings/net/stm32-dwmac.yaml | 9 +++++++++ >> 1 file changed, 9 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml >> index ca976281bfc22..67840cab02d2d 100644 >> --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml >> +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml >> @@ -78,12 +78,21 @@ properties: >> encompases the glue register, the offset of the control register and >> the mask to set bitfield in control register >> >> + st,ext-phyclk: >> + description: >> + set this property in RMII mode when you have PHY without crystal 50MHz and want to >> + select RCC clock instead of ETH_REF_CLK. or in RGMII mode when you want to select >> + RCC clock instead of ETH_CLK125. >> + type: boolean >> + >> st,eth-clk-sel: >> + deprecated: true >> description: >> set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125. >> type: boolean >> >> st,eth-ref-clk-sel: >> + deprecated: true >> description: >> set this property in RMII mode when you have PHY without crystal 50MHz and want to >> select RCC clock instead of ETH_REF_CLK. >> -- >> 2.25.1 >>
On Thu, Oct 05, 2023 at 11:03:43AM +0200, Christophe ROULLIER wrote: > > On 9/28/23 19:17, Conor Dooley wrote: > > On Thu, Sep 28, 2023 at 05:15:02PM +0200, Christophe Roullier wrote: > > > Add property st,ext-phyclk to manage cases when PHY have no cristal/quartz > > > This property can be used with RMII phy without cristal 50Mhz and when we > > > want to select RCC clock instead of ETH_REF_CLK > > > Can be used also with RGMII phy with no cristal and we select RCC clock > > > instead of ETH_CLK125 > > > This new property replace st,eth-clk-sel and st,eth-ref-clk-sel > > I don't really see a response to Rob's comment on v2, either here or in > > a reply to his email on v2: > > | Certainly 1 property is better than 2 for me, but carrying 3 is not > > | great. I don't understand why the we need a new property. What can't be > > | supported with the existing properties? > > > > A sentence saying explaining exactly what the old properties do not > > support that this one does, would be very helpful. > I understand your remarks, the goal of the new property is to be more simple > for customers/users > > with old properties we have lots of support to explain which one to use in > which cases, now only one property to use (regardless of mode) I'm inclined to say "that's tough" & that the existing property descriptions should be improved rather than adding yet a third one. Maybe you're lucky and Rob disagrees with me :) Thanks, Conor. > > > Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com> > > > --- > > > Documentation/devicetree/bindings/net/stm32-dwmac.yaml | 9 +++++++++ > > > 1 file changed, 9 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml > > > index ca976281bfc22..67840cab02d2d 100644 > > > --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml > > > +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml > > > @@ -78,12 +78,21 @@ properties: > > > encompases the glue register, the offset of the control register and > > > the mask to set bitfield in control register > > > + st,ext-phyclk: > > > + description: > > > + set this property in RMII mode when you have PHY without crystal 50MHz and want to > > > + select RCC clock instead of ETH_REF_CLK. or in RGMII mode when you want to select > > > + RCC clock instead of ETH_CLK125. > > > + type: boolean > > > + > > > st,eth-clk-sel: > > > + deprecated: true > > > description: > > > set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125. > > > type: boolean > > > st,eth-ref-clk-sel: > > > + deprecated: true > > > description: > > > set this property in RMII mode when you have PHY without crystal 50MHz and want to > > > select RCC clock instead of ETH_REF_CLK. > > > -- > > > 2.25.1 > > >
diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml index ca976281bfc22..67840cab02d2d 100644 --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml @@ -78,12 +78,21 @@ properties: encompases the glue register, the offset of the control register and the mask to set bitfield in control register + st,ext-phyclk: + description: + set this property in RMII mode when you have PHY without crystal 50MHz and want to + select RCC clock instead of ETH_REF_CLK. or in RGMII mode when you want to select + RCC clock instead of ETH_CLK125. + type: boolean + st,eth-clk-sel: + deprecated: true description: set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125. type: boolean st,eth-ref-clk-sel: + deprecated: true description: set this property in RMII mode when you have PHY without crystal 50MHz and want to select RCC clock instead of ETH_REF_CLK.