[v2,02/12] dt-bindings: net: add new property st,ext-phyclk in documentation for stm32
Message ID | 20230928122427.313271-3-christophe.roullier@foss.st.com |
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State | New |
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Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, Richard Cochran <richardcochran@gmail.com>, Jose Abreu <joabreu@synopsys.com>, Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>, Christophe Roullier <christophe.roullier@foss.st.com> CC: <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v2 02/12] dt-bindings: net: add new property st,ext-phyclk in documentation for stm32 Date: Thu, 28 Sep 2023 14:24:17 +0200 Message-ID: <20230928122427.313271-3-christophe.roullier@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230928122427.313271-1-christophe.roullier@foss.st.com> References: <20230928122427.313271-1-christophe.roullier@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.201.21.249] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-28_11,2023-09-28_01,2023-05-22_02 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Thu, 28 Sep 2023 05:25:35 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778293417571347452 X-GMAIL-MSGID: 1778293417571347452 |
Series |
Series to deliver Ethernets for STM32MP13
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Commit Message
Christophe Roullier
Sept. 28, 2023, 12:24 p.m. UTC
Add property st,ext-phyclk to manage cases when PHY have no cristal/quartz
This property can be used with RMII phy without cristal 50Mhz and when we
want to select RCC clock instead of ETH_REF_CLK
Can be used also with RGMII phy with no cristal and we select RCC clock
instead of ETH_CLK125
This new property replace st,eth-clk-sel and st,eth-ref-clk-sel
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
---
Documentation/devicetree/bindings/net/stm32-dwmac.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
Comments
On Thu, 28 Sep 2023 14:24:17 +0200, Christophe Roullier wrote: > Add property st,ext-phyclk to manage cases when PHY have no cristal/quartz > This property can be used with RMII phy without cristal 50Mhz and when we > want to select RCC clock instead of ETH_REF_CLK > Can be used also with RGMII phy with no cristal and we select RCC clock > instead of ETH_CLK125 > This new property replace st,eth-clk-sel and st,eth-ref-clk-sel > > Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com> > --- > Documentation/devicetree/bindings/net/stm32-dwmac.yaml | 9 +++++++++ > 1 file changed, 9 insertions(+) > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: ./Documentation/devicetree/bindings/net/stm32-dwmac.yaml:82:6: [warning] wrong indentation: expected 4 but found 5 (indentation) ./Documentation/devicetree/bindings/net/stm32-dwmac.yaml:83:7: [warning] wrong indentation: expected 7 but found 6 (indentation) ./Documentation/devicetree/bindings/net/stm32-dwmac.yaml:86:5: [error] syntax error: expected <block end>, but found '<block mapping start>' (syntax) dtschema/dtc warnings/errors: make[2]: *** Deleting file 'Documentation/devicetree/bindings/net/stm32-dwmac.example.dts' Documentation/devicetree/bindings/net/stm32-dwmac.yaml:86:5: did not find expected key make[2]: *** [Documentation/devicetree/bindings/Makefile:26: Documentation/devicetree/bindings/net/stm32-dwmac.example.dts] Error 1 make[2]: *** Waiting for unfinished jobs.... ./Documentation/devicetree/bindings/net/stm32-dwmac.yaml:86:5: did not find expected key /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/net/stm32-dwmac.yaml: ignoring, error parsing file make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1427: dt_binding_check] Error 2 make: *** [Makefile:234: __sub-make] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230928122427.313271-3-christophe.roullier@foss.st.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On Thu, Sep 28, 2023 at 02:24:17PM +0200, Christophe Roullier wrote: > Add property st,ext-phyclk to manage cases when PHY have no cristal/quartz > This property can be used with RMII phy without cristal 50Mhz and when we > want to select RCC clock instead of ETH_REF_CLK > Can be used also with RGMII phy with no cristal and we select RCC clock typo > instead of ETH_CLK125 > This new property replace st,eth-clk-sel and st,eth-ref-clk-sel Certainly 1 property is better than 2 for me, but carrying 3 is not great. I don't understand why the we need a new property. What can't be supported with the existing properties? > > Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com> > --- > Documentation/devicetree/bindings/net/stm32-dwmac.yaml | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml > index ca976281bfc22..54fda8b052abc 100644 > --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml > +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml > @@ -78,12 +78,21 @@ properties: > encompases the glue register, the offset of the control register and > the mask to set bitfield in control register > > + st,ext-phyclk: > + description: > + set this property in RMII mode when you have PHY without crystal 50MHz and want to > + select RCC clock instead of ETH_REF_CLK. or in RGMII mode when you want to select > + RCC clock instead of ETH_CLK125. > + type: boolean It's not clear to me what 'external' (assuming that's what 'ext' is short for) means. A crystal is external to the PHY too. So it means 'the PHY has no crystal'? That's a property of the PHY though, so it should be in the PHY's node. If you want this in the MAC node, then name the property and make the description primarily about the MAC modes. > + > st,eth-clk-sel: > + deprecated: true > description: > set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125. > type: boolean > > st,eth-ref-clk-sel: > + deprecated: true > description: > set this property in RMII mode when you have PHY without crystal 50MHz and want to > select RCC clock instead of ETH_REF_CLK. > -- > 2.25.1 >
diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml index ca976281bfc22..54fda8b052abc 100644 --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml @@ -78,12 +78,21 @@ properties: encompases the glue register, the offset of the control register and the mask to set bitfield in control register + st,ext-phyclk: + description: + set this property in RMII mode when you have PHY without crystal 50MHz and want to + select RCC clock instead of ETH_REF_CLK. or in RGMII mode when you want to select + RCC clock instead of ETH_CLK125. + type: boolean + st,eth-clk-sel: + deprecated: true description: set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125. type: boolean st,eth-ref-clk-sel: + deprecated: true description: set this property in RMII mode when you have PHY without crystal 50MHz and want to select RCC clock instead of ETH_REF_CLK.