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[23.128.96.31]) by mx.google.com with ESMTPS id dc15-20020a056a0035cf00b00690cb77d5e5si14711886pfb.394.2023.09.28.02.42.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Sep 2023 02:43:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) client-ip=23.128.96.31; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=TKTUzlO9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.31 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 7ED9B80206AD; Thu, 28 Sep 2023 01:57:29 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231494AbjI1I4y (ORCPT + 21 others); Thu, 28 Sep 2023 04:56:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56168 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231667AbjI1I42 (ORCPT ); Thu, 28 Sep 2023 04:56:28 -0400 Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B184CC0 for ; Thu, 28 Sep 2023 01:56:23 -0700 (PDT) Received: by mail-pf1-x42f.google.com with SMTP id d2e1a72fcca58-692ada71d79so8818238b3a.1 for ; Thu, 28 Sep 2023 01:56:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1695891382; x=1696496182; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7qcgxDDgTxmmlWPjM/0+c7XReaFHyX/zuBcA4QvtDQY=; b=TKTUzlO9C9mf2LAoX32dOhb13lY8g6/ruMna5AE7SVyJYeBW4viQfwTD2YrUVe6oWH u0kh2Jdyu5x6mP2Uj20Ao/gLxZF4th4Dk3Ou01uPf42BNDv3CJR0FbKi2kcESKGWgHCL kqTGp4nf2e+wKfUXLUsdadkXOKpvN+kb8AtpY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695891382; x=1696496182; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7qcgxDDgTxmmlWPjM/0+c7XReaFHyX/zuBcA4QvtDQY=; b=r6UdjOgAC4OBW1EYxo6dhxhd/pzzP6nJ147k2/Lj6oRbXtGzNZ+C8wnND7JFHfk3V+ sx55OT3pyHizQ2IGYYw+Rz8SanXEQ9R6jXjEo7Xy1IzsqSlZCDgQZE2vzvlxeN0VOPE5 kEezSuCAlLgsnleV6Jy+BlQ7eDdHZAJRc7nvAlFWSGuB4Xfy4pIrXy0/8Y4W+ZQmnf4b KrkriWGGJaIuvgUBVahWM7cPhd1o68ik1lh8OMiEmGeTsWYxfW6AMjR8Sblcc5pzIQU5 fFocqcVcisVQzWvbymC+L7VMR89GW8Iq7NseBH1wv6IpakDygFabKBhmLbP4NSycPTgu GYtg== X-Gm-Message-State: AOJu0Yzjo8iI8bsZbtFgODQj0/iBKSPkm2qrnCPq+UlkTv+VqWRcudIR NP9iFQpJP2oYBobh3xzJd0mQOQ== X-Received: by 2002:a05:6a00:3a1e:b0:68e:417c:ed5c with SMTP id fj30-20020a056a003a1e00b0068e417ced5cmr519182pfb.32.1695891382577; Thu, 28 Sep 2023 01:56:22 -0700 (PDT) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:6747:c12a:dbfd:2cc7]) by smtp.gmail.com with ESMTPSA id y7-20020aa78047000000b006879493aca0sm1754016pfm.26.2023.09.28.01.56.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 Sep 2023 01:56:22 -0700 (PDT) From: Chen-Yu Tsai To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Mark Brown Cc: Chen-Yu Tsai , Lee Jones , Zhiyong Tao , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: [PATCH v4 11/12] regulator: mt6358: Add supply names for MT6366 regulators Date: Thu, 28 Sep 2023 16:55:34 +0800 Message-ID: <20230928085537.3246669-12-wenst@chromium.org> X-Mailer: git-send-email 2.42.0.582.g8ccd20d70d-goog In-Reply-To: <20230928085537.3246669-1-wenst@chromium.org> References: <20230928085537.3246669-1-wenst@chromium.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Thu, 28 Sep 2023 01:57:29 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778273935569058553 X-GMAIL-MSGID: 1778273935569058553 The DT bindings for MT6366 regulator defines the supply names for the PMIC. Add support for them by adding .supply_name field settings for each regulator. The buck regulators each have their own supply whose name can be derived from the regulator name. The LDOs have shared supplies. Signed-off-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/regulator/mt6358-regulator.c | 77 +++++++++++++--------------- 1 file changed, 37 insertions(+), 40 deletions(-) diff --git a/drivers/regulator/mt6358-regulator.c b/drivers/regulator/mt6358-regulator.c index 5e23b2aa3486..e4745f616cea 100644 --- a/drivers/regulator/mt6358-regulator.c +++ b/drivers/regulator/mt6358-regulator.c @@ -140,6 +140,7 @@ struct mt6358_regulator_info { [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ + .supply_name = "vsys-" match, \ .of_match = of_match_ptr(match), \ .ops = &mt6358_buck_ops, \ .type = REGULATOR_VOLTAGE, \ @@ -162,10 +163,11 @@ struct mt6358_regulator_info { .modeset_mask = BIT(_modeset_shift), \ } -#define MT6366_LDO(match, vreg, volt_ranges, enreg, enbit, vosel, vosel_mask) \ +#define MT6366_LDO(match, vreg, volt_ranges, supply, enreg, enbit, vosel, vosel_mask) \ [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ + .supply_name = supply, \ .of_match = of_match_ptr(match), \ .ops = &mt6358_volt_table_ops, \ .type = REGULATOR_VOLTAGE, \ @@ -186,12 +188,12 @@ struct mt6358_regulator_info { .qi = BIT(15), \ } -#define MT6366_LDO1(match, vreg, min, max, step, \ - _da_vsel_reg, _da_vsel_mask, \ - vosel, vosel_mask) \ +#define MT6366_LDO1(match, vreg, supply, min, max, step, \ + _da_vsel_reg, _da_vsel_mask, vosel, vosel_mask) \ [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ + .supply_name = supply, \ .of_match = of_match_ptr(match), \ .ops = &mt6358_volt_range_ops, \ .type = REGULATOR_VOLTAGE, \ @@ -211,11 +213,11 @@ struct mt6358_regulator_info { .qi = BIT(0), \ } -#define MT6366_REG_FIXED(match, vreg, \ - enreg, enbit, volt) \ +#define MT6366_REG_FIXED(match, vreg, supply, enreg, enbit, volt) \ [MT6366_ID_##vreg] = { \ .desc = { \ .name = #vreg, \ + .supply_name = supply, \ .of_match = of_match_ptr(match), \ .ops = &mt6358_volt_fixed_ops, \ .type = REGULATOR_VOLTAGE, \ @@ -590,57 +592,52 @@ static const struct mt6358_regulator_info mt6366_regulators[] = { 0x7f, MT6358_BUCK_VMODEM_DBG0, 0x7f, MT6358_VMODEM_ANA_CON0, 8), MT6366_BUCK("vs1", VS1, 1000000, 2587500, 12500, 0x7f, MT6358_BUCK_VS1_DBG0, 0x7f, MT6358_VS1_ANA_CON0, 8), - MT6366_REG_FIXED("vrf12", VRF12, - MT6358_LDO_VRF12_CON0, 0, 1200000), - MT6366_REG_FIXED("vio18", VIO18, - MT6358_LDO_VIO18_CON0, 0, 1800000), - MT6366_REG_FIXED("vfe28", VFE28, MT6358_LDO_VFE28_CON0, 0, 2800000), - MT6366_REG_FIXED("vcn28", VCN28, MT6358_LDO_VCN28_CON0, 0, 2800000), - MT6366_REG_FIXED("vxo22", VXO22, MT6358_LDO_VXO22_CON0, 0, 2200000), - MT6366_REG_FIXED("vaux18", VAUX18, - MT6358_LDO_VAUX18_CON0, 0, 1800000), - MT6366_REG_FIXED("vbif28", VBIF28, - MT6358_LDO_VBIF28_CON0, 0, 2800000), - MT6366_REG_FIXED("vio28", VIO28, MT6358_LDO_VIO28_CON0, 0, 2800000), - MT6366_REG_FIXED("va12", VA12, MT6358_LDO_VA12_CON0, 0, 1200000), - MT6366_REG_FIXED("vrf18", VRF18, MT6358_LDO_VRF18_CON0, 0, 1800000), - MT6366_REG_FIXED("vaud28", VAUD28, - MT6358_LDO_VAUD28_CON0, 0, 2800000), - MT6366_LDO("vdram2", VDRAM2, vdram2, + MT6366_REG_FIXED("vrf12", VRF12, "vs2-ldo2", MT6358_LDO_VRF12_CON0, 0, 1200000), + MT6366_REG_FIXED("vio18", VIO18, "vs1-ldo1", MT6358_LDO_VIO18_CON0, 0, 1800000), + MT6366_REG_FIXED("vfe28", VFE28, "vsys-ldo1", MT6358_LDO_VFE28_CON0, 0, 2800000), + MT6366_REG_FIXED("vcn28", VCN28, "vsys-ldo1", MT6358_LDO_VCN28_CON0, 0, 2800000), + MT6366_REG_FIXED("vxo22", VXO22, "vsys-ldo1", MT6358_LDO_VXO22_CON0, 0, 2200000), + MT6366_REG_FIXED("vaux18", VAUX18, "vsys-ldo1", MT6358_LDO_VAUX18_CON0, 0, 1800000), + MT6366_REG_FIXED("vbif28", VBIF28, "vsys-ldo1", MT6358_LDO_VBIF28_CON0, 0, 2800000), + MT6366_REG_FIXED("vio28", VIO28, "vsys-ldo2", MT6358_LDO_VIO28_CON0, 0, 2800000), + MT6366_REG_FIXED("va12", VA12, "vs2-ldo2", MT6358_LDO_VA12_CON0, 0, 1200000), + MT6366_REG_FIXED("vrf18", VRF18, "vs1-ldo1", MT6358_LDO_VRF18_CON0, 0, 1800000), + MT6366_REG_FIXED("vaud28", VAUD28, "vsys-ldo1", MT6358_LDO_VAUD28_CON0, 0, 2800000), + MT6366_LDO("vdram2", VDRAM2, vdram2, "vs2-ldo1", MT6358_LDO_VDRAM2_CON0, 0, MT6358_LDO_VDRAM2_ELR0, 0x10), - MT6366_LDO("vsim1", VSIM1, vsim, + MT6366_LDO("vsim1", VSIM1, vsim, "vsys-ldo1", MT6358_LDO_VSIM1_CON0, 0, MT6358_VSIM1_ANA_CON0, 0xf00), - MT6366_LDO("vibr", VIBR, vibr, + MT6366_LDO("vibr", VIBR, vibr, "vsys-ldo3", MT6358_LDO_VIBR_CON0, 0, MT6358_VIBR_ANA_CON0, 0xf00), - MT6366_LDO("vusb", VUSB, vusb, + MT6366_LDO("vusb", VUSB, vusb, "vsys-ldo1", MT6358_LDO_VUSB_CON0_0, 0, MT6358_VUSB_ANA_CON0, 0x700), - MT6366_LDO("vefuse", VEFUSE, vefuse, + MT6366_LDO("vefuse", VEFUSE, vefuse, "vs1-ldo1", MT6358_LDO_VEFUSE_CON0, 0, MT6358_VEFUSE_ANA_CON0, 0xf00), - MT6366_LDO("vmch", VMCH, vmch_vemc, + MT6366_LDO("vmch", VMCH, vmch_vemc, "vsys-ldo2", MT6358_LDO_VMCH_CON0, 0, MT6358_VMCH_ANA_CON0, 0x700), - MT6366_LDO("vemc", VEMC, vmch_vemc, + MT6366_LDO("vemc", VEMC, vmch_vemc, "vsys-ldo3", MT6358_LDO_VEMC_CON0, 0, MT6358_VEMC_ANA_CON0, 0x700), - MT6366_LDO("vcn33", VCN33, vcn33, + MT6366_LDO("vcn33", VCN33, vcn33, "vsys-ldo3", MT6358_LDO_VCN33_CON0_0, 0, MT6358_VCN33_ANA_CON0, 0x300), - MT6366_LDO("vmc", VMC, vmc, + MT6366_LDO("vmc", VMC, vmc, "vsys-ldo2", MT6358_LDO_VMC_CON0, 0, MT6358_VMC_ANA_CON0, 0xf00), - MT6366_LDO("vsim2", VSIM2, vsim, + MT6366_LDO("vsim2", VSIM2, vsim, "vsys-ldo2", MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00), - MT6366_LDO("vcn18", VCN18, mt6366_vcn18_vm18, + MT6366_LDO("vcn18", VCN18, mt6366_vcn18_vm18, "vs1-ldo1", MT6358_LDO_VCN18_CON0, 0, MT6358_VCN18_ANA_CON0, 0xf00), - MT6366_LDO("vm18", VM18, mt6366_vcn18_vm18, + MT6366_LDO("vm18", VM18, mt6366_vcn18_vm18, "vs1-ldo1", MT6358_LDO_VM18_CON0, 0, MT6358_VM18_ANA_CON0, 0xf00), - MT6366_LDO("vmddr", VMDDR, mt6366_vmddr, + MT6366_LDO("vmddr", VMDDR, mt6366_vmddr, "vs2-ldo1", MT6358_LDO_VMDDR_CON0, 0, MT6358_VMDDR_ANA_CON0, 0xf00), - MT6366_LDO1("vsram-proc11", VSRAM_PROC11, 500000, 1293750, 6250, + MT6366_LDO1("vsram-proc11", VSRAM_PROC11, "vs2-ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f), - MT6366_LDO1("vsram-others", VSRAM_OTHERS, 500000, 1293750, 6250, + MT6366_LDO1("vsram-others", VSRAM_OTHERS, "vs2-ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_OTHERS_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON2, 0x7f), - MT6366_LDO1("vsram-gpu", VSRAM_GPU, 500000, 1293750, 6250, + MT6366_LDO1("vsram-gpu", VSRAM_GPU, "vs2-ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON3, 0x7f), - MT6366_LDO1("vsram-proc12", VSRAM_PROC12, 500000, 1293750, 6250, + MT6366_LDO1("vsram-proc12", VSRAM_PROC12, "vs2-ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON1, 0x7f), - MT6366_LDO1("vsram-core", VSRAM_CORE, 500000, 1293750, 6250, + MT6366_LDO1("vsram-core", VSRAM_CORE, "vs2-ldo3", 500000, 1293750, 6250, MT6358_LDO_VSRAM_CORE_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON5, 0x7f), };