From patchwork Wed Sep 20 15:46:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 142685 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:172:b0:3f2:4152:657d with SMTP id h50csp4546278vqi; Wed, 20 Sep 2023 18:38:33 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGCun/NMAx3JRH2gZz14y642T3ePTibySDc5atgFDVs7x9srTcEtXBWndcQ+YZD3ECTZO/v X-Received: by 2002:a05:6a00:1a87:b0:690:454a:dc7b with SMTP id e7-20020a056a001a8700b00690454adc7bmr4678601pfv.28.1695260313446; Wed, 20 Sep 2023 18:38:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695260313; cv=none; d=google.com; s=arc-20160816; b=xNFcDkyYqjM6pbkJM2cXGSEmVGznkAa6kzsRLGm7umcVr+X4mzzrldbaQJkJWfFYGh kCkKVHBCPfdWDWbsYM8pcCZw3MUGnILfioMsLbgOBXVSN1SFCj2hD5lMa6myk6LIJnwI /myeudpi3Z7hQjKJAWT5mlzPFswEO67jtS/Ys3jXaC90oQExFCAMpt7hxCJ+g649IrN1 AdNi0ZUHCae8MoxSV1a0KwSkD4BEzVHzjCaCsaY6o3UqbMBHXlCb08qR1umy1Nc81EVb 6XV61yRSRTx3m+YERnx8BOoIM/4UGZ5FgL6wKso28PKghWmdysXkHoxp7SLcu2Xy63xl Kjzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=JEpzhn0/r3h7zE+n/9TA9uRn8epPj0d0ldcwcNh6iPI=; fh=665Qm2DFjeImEVP2NCXef/1YQ8IF0QpHIEyBqpmie5I=; b=nuINCn1Zgxiw/VmisQza3mAw7cKEEHXYfXN/3NITR58cj6IEMwlZXcnMH1gNpTy1fu /+d1VagjAeiWuSm8kUBCXV/fYhMhS0blJjerH7/Gi84e/ozePamw2/lL5BdCilL9Bn4B QfT8xIM3z2utzUqRFOEzlul9R9jCRkJt7bcj+Fx+8naGntDbv49KPRDyuXQ5ty9Nhdus aRCQH9Fv9xpeUTFjPc9o76CLERermbDkA7CQ/aLRbb8IwLAk7Q2kbsEQDEtgTgliHDI3 ShnY12sHYxqxCkqhQFMgVKW8w6opthfwHYOE3/HoLnrgp/1EM2K0mnc8SOS3bUfGx9NX PatA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=pnsIS2+M; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id ca17-20020a056a00419100b0068fca4405aasi356180pfb.338.2023.09.20.18.38.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Sep 2023 18:38:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@ventanamicro.com header.s=google header.b=pnsIS2+M; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 3336B81BAF0F; Wed, 20 Sep 2023 08:47:03 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236845AbjITPqu (ORCPT + 27 others); Wed, 20 Sep 2023 11:46:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236814AbjITPqr (ORCPT ); Wed, 20 Sep 2023 11:46:47 -0400 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B934CF2 for ; Wed, 20 Sep 2023 08:46:40 -0700 (PDT) Received: by mail-pl1-x633.google.com with SMTP id d9443c01a7336-1c5cd27b1acso972005ad.2 for ; Wed, 20 Sep 2023 08:46:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1695224800; x=1695829600; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JEpzhn0/r3h7zE+n/9TA9uRn8epPj0d0ldcwcNh6iPI=; b=pnsIS2+MTr2syyrsxFZt/NPneM/jbrZM+vk1hWMRdcktLCahZ5qNh6DdmvHWfLanSC dMQoxCi0zx9jP7VvVr56THiz0lVK53+LZwo918oBaWIKxGP2IhN0ZqEEvboE/P39Ae+p xjvUwmA3QiXbuJ1Ao389VLBWeiLw8qa7eWlfXdYadW/5ftumg9+MEE0IkVlazRqrhqPK +Vt6+ZUldom8MdnnhmP7fWC6M62qLLlUgYToMcobwhptAeFgTP//T5KHqO/QJdrWufg4 3Uz5LPOmZBwhemVi5dy9akfH6dEJxTvghjgY8ClQcigL77zLBFivRv6Vqfjw3iyOWtG0 bs5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695224800; x=1695829600; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JEpzhn0/r3h7zE+n/9TA9uRn8epPj0d0ldcwcNh6iPI=; b=JMFSkflSeLL2E+ev1E35QwbRzURfZADeMzQpv93ExGf7hNHxp1mYfqOfGJmt03SdLY z7MEUEo4hPA9MzhdzerneR2S2sR4GYralyVsUz+bvT1TH+CNa9IjSmAWU99J+OsdKGsD ae/FzESP8eEmVy2WIZjLa02zcYAg8Sy1Melpd/al6eXTIG/dLL19ODT0+86MaIvVMMF1 X4tbp3ZO/rAD7MZZX/+y+adtJnUx6Px543409ooaznCN4xjNXIJRN0bdgcMtpCpZeZ3z Xh5/GnGywg6c4WtDx+B2VDJuCd+WhfD+TB557sUi/JI5mbjBYY5A6MVGelMiftHIhP7+ +mAA== X-Gm-Message-State: AOJu0YyEJtjYGqGIey3x9nGWOP8Lv+QWwr0FP8IvXnC4Vto7hVYV4phV JagBNLDmNUe02Eel5Yt3l5nsow== X-Received: by 2002:a17:902:c142:b0:1c4:bc8:4b64 with SMTP id 2-20020a170902c14200b001c40bc84b64mr2711290plj.5.1695224799935; Wed, 20 Sep 2023 08:46:39 -0700 (PDT) Received: from anup-ubuntu-vm.localdomain ([171.76.85.109]) by smtp.gmail.com with ESMTPSA id m7-20020a170902db0700b001c0de73564dsm11995153plx.205.2023.09.20.08.46.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Sep 2023 08:46:39 -0700 (PDT) From: Anup Patel To: Paolo Bonzini , Atish Patra , Shuah Khan Cc: Palmer Dabbelt , Paul Walmsley , Andrew Jones , kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Anup Patel , Atish Patra Subject: [PATCH v2 4/4] KVM: riscv: selftests: Selectively filter-out AIA registers Date: Wed, 20 Sep 2023 21:16:08 +0530 Message-Id: <20230920154608.1447057-5-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230920154608.1447057-1-apatel@ventanamicro.com> References: <20230920154608.1447057-1-apatel@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 20 Sep 2023 08:47:03 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1777589871805674959 X-GMAIL-MSGID: 1777609278508986862 Currently the AIA ONE_REG registers are reported by get-reg-list as new registers for various vcpu_reg_list configs whenever Ssaia is available on the host because Ssaia extension can only be disabled by Smstateen extension which is not always available. To tackle this, we should filter-out AIA ONE_REG registers only when Ssaia can't be disabled for a VCPU. Fixes: 477069398ed6 ("KVM: riscv: selftests: Add get-reg-list test") Signed-off-by: Anup Patel Reviewed-by: Atish Patra --- .../selftests/kvm/riscv/get-reg-list.c | 23 +++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c index 76c0ad11e423..9f99ea42f45f 100644 --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c @@ -12,6 +12,8 @@ #define REG_MASK (KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK) +static bool isa_ext_cant_disable[KVM_RISCV_ISA_EXT_MAX]; + bool filter_reg(__u64 reg) { switch (reg & ~REG_MASK) { @@ -48,6 +50,15 @@ bool filter_reg(__u64 reg) case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZIFENCEI: case KVM_REG_RISCV_ISA_EXT | KVM_RISCV_ISA_EXT_ZIHPM: return true; + /* AIA registers are always available when Ssaia can't be disabled */ + case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(siselect): + case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(iprio1): + case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(iprio2): + case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(sieh): + case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(siph): + case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(iprio1h): + case KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_AIA | KVM_REG_RISCV_CSR_AIA_REG(iprio2h): + return isa_ext_cant_disable[KVM_RISCV_ISA_EXT_SSAIA]; default: break; } @@ -71,14 +82,22 @@ static inline bool vcpu_has_ext(struct kvm_vcpu *vcpu, int ext) void finalize_vcpu(struct kvm_vcpu *vcpu, struct vcpu_reg_list *c) { + unsigned long isa_ext_state[KVM_RISCV_ISA_EXT_MAX] = { 0 }; struct vcpu_reg_sublist *s; + int rc; + + for (int i = 0; i < KVM_RISCV_ISA_EXT_MAX; i++) + __vcpu_get_reg(vcpu, RISCV_ISA_EXT_REG(i), &isa_ext_state[i]); /* * Disable all extensions which were enabled by default * if they were available in the risc-v host. */ - for (int i = 0; i < KVM_RISCV_ISA_EXT_MAX; i++) - __vcpu_set_reg(vcpu, RISCV_ISA_EXT_REG(i), 0); + for (int i = 0; i < KVM_RISCV_ISA_EXT_MAX; i++) { + rc = __vcpu_set_reg(vcpu, RISCV_ISA_EXT_REG(i), 0); + if (rc && isa_ext_state[i]) + isa_ext_cant_disable[i] = true; + } for_each_sublist(c, s) { if (!s->feature)