diff mbox series

[v2,03/11] soc: mediatek: Disable 9-bit alpha in ETHDR

Message ID 20230918084207.23604-4-shawn.sung@mediatek.com
State New
Headers
Series Support IGT in display driver |

Commit Message

Shawn Sung (宋孝謙) Sept. 18, 2023, 8:41 a.m. UTC 
  ETHDR 9-bit alpha should be disabled by default,
otherwise alpha blending will not work.

Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
 drivers/soc/mediatek/mtk-mmsys.c | 1 +
 1 file changed, 1 insertion(+)

Comments

AngeloGioacchino Del Regno Sept. 18, 2023, 9:06 a.m. UTC | #1 
Il 18/09/23 10:41, Hsiao Chien Sung ha scritto:
> ETHDR 9-bit alpha should be disabled by default,
> otherwise alpha blending will not work.
> 
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff mbox series

Patch

diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index ffb75711a1da..8b6c39b5d1b4 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -209,6 +209,7 @@  void mtk_mmsys_mixer_in_config(struct device *dev, int idx, bool alpha_sel, u16
 
 	mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_ALPHA + (idx - 1) * 4, ~0,
 			      alpha << 16 | alpha, cmdq_pkt);
+	mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(15 + idx), 0, cmdq_pkt);
 	mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(19 + idx),
 			      alpha_sel << (19 + idx), cmdq_pkt);
 	mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1) * 4,