Message ID | 20230912174928.528414-2-apatel@ventanamicro.com |
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State | New |
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Tue, 12 Sep 2023 10:50:24 -0700 (PDT) Received: from localhost.localdomain ([171.76.81.83]) by smtp.gmail.com with ESMTPSA id p12-20020a170902a40c00b001b891259eddsm8691440plq.197.2023.09.12.10.50.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Sep 2023 10:50:23 -0700 (PDT) From: Anup Patel <apatel@ventanamicro.com> To: Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Frank Rowand <frowand.list@gmail.com>, Conor Dooley <conor+dt@kernel.org> Cc: Atish Patra <atishp@atishpatra.org>, Andrew Jones <ajones@ventanamicro.com>, Sunil V L <sunilvl@ventanamicro.com>, Saravana Kannan <saravanak@google.com>, Anup Patel <anup@brainfault.org>, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Anup Patel <apatel@ventanamicro.com> Subject: [PATCH v8 01/16] RISC-V: Don't fail in riscv_of_parent_hartid() for disabled HARTs Date: Tue, 12 Sep 2023 23:19:13 +0530 Message-Id: <20230912174928.528414-2-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230912174928.528414-1-apatel@ventanamicro.com> References: <20230912174928.528414-1-apatel@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); 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Series |
Linux RISC-V AIA Support
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Commit Message
Anup Patel
Sept. 12, 2023, 5:49 p.m. UTC
The riscv_of_processor_hartid() used by riscv_of_parent_hartid() fails
for HARTs disabled in the DT. This results in the following warning
thrown by the RISC-V INTC driver for the E-core on SiFive boards:
[ 0.000000] riscv-intc: unable to find hart id for /cpus/cpu@0/interrupt-controller
The riscv_of_parent_hartid() is only expected to read the hartid from
the DT so we should directly call of_get_cpu_hwid() instead of calling
riscv_of_processor_hartid().
Fixes: ad635e723e17 ("riscv: cpu: Add 64bit hartid support on RV64")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
arch/riscv/kernel/cpu.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
Comments
On Tue, Sep 12, 2023 at 10:50 AM Anup Patel <apatel@ventanamicro.com> wrote: > > The riscv_of_processor_hartid() used by riscv_of_parent_hartid() fails > for HARTs disabled in the DT. This results in the following warning > thrown by the RISC-V INTC driver for the E-core on SiFive boards: > > [ 0.000000] riscv-intc: unable to find hart id for /cpus/cpu@0/interrupt-controller > > The riscv_of_parent_hartid() is only expected to read the hartid from > the DT so we should directly call of_get_cpu_hwid() instead of calling > riscv_of_processor_hartid(). > > Fixes: ad635e723e17 ("riscv: cpu: Add 64bit hartid support on RV64") > Signed-off-by: Anup Patel <apatel@ventanamicro.com> > --- > arch/riscv/kernel/cpu.c | 11 ++++++----- > 1 file changed, 6 insertions(+), 5 deletions(-) > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c > index c17dacb1141c..157ace8b262c 100644 > --- a/arch/riscv/kernel/cpu.c > +++ b/arch/riscv/kernel/cpu.c > @@ -125,13 +125,14 @@ int __init riscv_early_of_processor_hartid(struct device_node *node, unsigned lo > */ > int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid) > { > - int rc; > - > for (; node; node = node->parent) { > if (of_device_is_compatible(node, "riscv")) { > - rc = riscv_of_processor_hartid(node, hartid); > - if (!rc) > - return 0; > + *hartid = (unsigned long)of_get_cpu_hwid(node, 0); > + if (*hartid == ~0UL) { > + pr_warn("Found CPU without hart ID\n"); > + return -ENODEV; > + } > + return 0; > } > } > > -- > 2.34.1 > LGTM. Reviewed-by: Atish Patra <atishp@rivosinc.com>
diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index c17dacb1141c..157ace8b262c 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -125,13 +125,14 @@ int __init riscv_early_of_processor_hartid(struct device_node *node, unsigned lo */ int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid) { - int rc; - for (; node; node = node->parent) { if (of_device_is_compatible(node, "riscv")) { - rc = riscv_of_processor_hartid(node, hartid); - if (!rc) - return 0; + *hartid = (unsigned long)of_get_cpu_hwid(node, 0); + if (*hartid == ~0UL) { + pr_warn("Found CPU without hart ID\n"); + return -ENODEV; + } + return 0; } }