Message ID | 20230912065501.530637507@linutronix.de |
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State | New |
Headers |
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[23.128.96.33]) by mx.google.com with ESMTPS id z16-20020a656650000000b00573fd89e62asi9336002pgv.483.2023.09.13.00.43.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Sep 2023 00:43:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=wj1dVLTG; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id 168BA816EF53; Tue, 12 Sep 2023 00:59:03 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232057AbjILH6o (ORCPT <rfc822;pwkd43@gmail.com> + 39 others); Tue, 12 Sep 2023 03:58:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232095AbjILH62 (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Tue, 12 Sep 2023 03:58:28 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6651C1733 for <linux-kernel@vger.kernel.org>; Tue, 12 Sep 2023 00:58:04 -0700 (PDT) Message-ID: <20230912065501.530637507@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1694505483; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ihivJowKww+fe1UCzdxyPRQezAmQeOqgMJYs1huTU/U=; b=wj1dVLTGF6RgQZ93P3v00gpeCt+n3ShYIi8VyQFE55ZOsZOXkp6ajCHFqdMtSDVxOo4qVm s9AoaiRwqEmjibvFZnZ02gCd0yYaNngTLCZqDYCOG5ukSHrxA8gn775Kd++ALwx8y3nlOd Bv875kw34ZDaO/BgQEecef9lrugWjpN7o1YHSLZXFc2HjjejFqfzVNZ0g6mq8Z+vCgW8tt +uBcYa128XANDG0st3buDjsZo2mSUOW4fEJjRwKjuDGu49TyNYqcUwmeebS5G+bymprNke UmBec4clGrp9SVwcPic0rnNj0Cv0hGb2vzGshg6+uPhzouO9mxNgekxQbrUibA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1694505483; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=ihivJowKww+fe1UCzdxyPRQezAmQeOqgMJYs1huTU/U=; b=pjHTtTC9LC4Q6P8H4sYw/dU1Irf8uOq7L4qiAeB9uAO0JCf+WSRPi7+kH1Vcpg4K5aOnMk bkHtbiYKaEiWYLCQ== From: Thomas Gleixner <tglx@linutronix.de> To: LKML <linux-kernel@vger.kernel.org> Cc: x86@kernel.org, Borislav Petkov <bp@alien8.de>, "Chang S. Bae" <chang.seok.bae@intel.com>, Arjan van de Ven <arjan@linux.intel.com>, Nikolay Borisov <nik.borisov@suse.com> Subject: [patch V3 12/30] x86/microcode/intel: Reuse intel_cpu_collect_info() References: <20230912065249.695681286@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Date: Tue, 12 Sep 2023 09:58:02 +0200 (CEST) Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Tue, 12 Sep 2023 00:59:03 -0700 (PDT) X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1776907452821683618 X-GMAIL-MSGID: 1776907452821683618 |
Series |
x86/microcode: Cleanup and late loading enhancements
|
|
Commit Message
Thomas Gleixner
Sept. 12, 2023, 7:58 a.m. UTC
No point for an almost duplicate function.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
V2: New patch
---
arch/x86/kernel/cpu/microcode/intel.c | 16 +---------------
1 file changed, 1 insertion(+), 15 deletions(-)
Comments
On Tue, Sep 12, 2023 at 09:58:02AM +0200, Thomas Gleixner wrote:
> static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
You can get rid of that silly wrapper too and use
intel_collect_cpu_info() in the function pointer assignment directly.
Diff ontop:
---
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index 4066dd3734ba..581ecfbaf134 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -75,7 +75,7 @@ extern __noendbr void cet_disable(void);
struct cpu_signature;
-void intel_collect_cpu_info(struct cpu_signature *sig);
+void intel_collect_cpu_info(int unused, struct cpu_signature *sig);
static inline bool intel_cpu_signatures_match(unsigned int s1, unsigned int p1,
unsigned int s2, unsigned int p2)
diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index 6c3b10e6b214..ebf0908fd91a 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -652,7 +652,7 @@ void reload_ucode_amd(unsigned int cpu)
}
}
-static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
+static void collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
{
struct cpuinfo_x86 *c = &cpu_data(cpu);
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
@@ -670,8 +670,6 @@ static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
uci->mc = p->data;
pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
-
- return 0;
}
static enum ucode_state apply_microcode_amd(int cpu)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index 6d67b92d7252..77e4120de641 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -66,7 +66,7 @@ static inline unsigned int exttable_size(struct extended_sigtable *et)
return et->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE;
}
-void intel_collect_cpu_info(struct cpu_signature *sig)
+void intel_collect_cpu_info(int unused, struct cpu_signature *sig)
{
sig->sig = cpuid_eax(1);
sig->pf = 0;
@@ -362,7 +362,7 @@ static __init struct microcode_intel *get_ucode_from_cpio(struct ucode_cpu_info
if (!(cp.data && cp.size))
return NULL;
- intel_collect_cpu_info(&uci->cpu_sig);
+ intel_collect_cpu_info(0, &uci->cpu_sig);
return scan_microcode(cp.data, cp.size, uci);
}
@@ -423,12 +423,6 @@ void reload_ucode_intel(void)
apply_microcode_early(&uci, false);
}
-static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
-{
- intel_collect_cpu_info(csig);
- return 0;
-}
-
static enum ucode_state apply_microcode_late(int cpu)
{
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
@@ -591,7 +585,7 @@ static void finalize_late_load(int result)
static struct microcode_ops microcode_intel_ops = {
.request_microcode_fw = request_microcode_fw,
- .collect_cpu_info = collect_cpu_info,
+ .collect_cpu_info = intel_collect_cpu_info,
.apply_microcode = apply_microcode_late,
.finalize_late_load = finalize_late_load,
};
diff --git a/arch/x86/kernel/cpu/microcode/internal.h b/arch/x86/kernel/cpu/microcode/internal.h
index 051b7956d4fd..b3753025cd4a 100644
--- a/arch/x86/kernel/cpu/microcode/internal.h
+++ b/arch/x86/kernel/cpu/microcode/internal.h
@@ -30,7 +30,7 @@ struct microcode_ops {
* See also the "Synchronization" section in microcode_core.c.
*/
enum ucode_state (*apply_microcode)(int cpu);
- int (*collect_cpu_info)(int cpu, struct cpu_signature *csig);
+ void (*collect_cpu_info)(int cpu, struct cpu_signature *csig);
void (*finalize_late_load)(int result);
};
On Thu, Sep 21 2023 at 12:42, Borislav Petkov wrote: > On Tue, Sep 12, 2023 at 09:58:02AM +0200, Thomas Gleixner wrote: >> static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) > > You can get rid of that silly wrapper too and use > intel_collect_cpu_info() in the function pointer assignment directly. > > Diff ontop: > > --- > > diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h > index 4066dd3734ba..581ecfbaf134 100644 > --- a/arch/x86/include/asm/cpu.h > +++ b/arch/x86/include/asm/cpu.h > @@ -75,7 +75,7 @@ extern __noendbr void cet_disable(void); > > struct cpu_signature; > > -void intel_collect_cpu_info(struct cpu_signature *sig); > +void intel_collect_cpu_info(int unused, struct cpu_signature *sig); Eew. That's a function exposed to code outside of microcode and just grows that unused argument for no value and you obviously forgot to fixup the extern callsite :) > diff --git a/arch/x86/kernel/cpu/microcode/internal.h b/arch/x86/kernel/cpu/microcode/internal.h > index 051b7956d4fd..b3753025cd4a 100644 > --- a/arch/x86/kernel/cpu/microcode/internal.h > +++ b/arch/x86/kernel/cpu/microcode/internal.h > @@ -30,7 +30,7 @@ struct microcode_ops { > * See also the "Synchronization" section in microcode_core.c. > */ > enum ucode_state (*apply_microcode)(int cpu); > - int (*collect_cpu_info)(int cpu, struct cpu_signature *csig); > + void (*collect_cpu_info)(int cpu, struct cpu_signature *csig); > void (*finalize_late_load)(int result); Making this void makes sense, but that's a separate change. Thanks, tglx
On Mon, Sep 25, 2023 at 12:47:16PM +0200, Thomas Gleixner wrote: > Eew. That's a function exposed to code outside of microcode and just > grows that unused argument for no value and you obviously forgot to > fixup the extern callsite :) It's used on AMD. Adding the below to the pile. --- From: "Borislav Petkov (AMD)" <bp@alien8.de> Date: Tue, 3 Oct 2023 16:12:01 +0200 Subject: [PATCH] x86/microcode: Make microcode_ops.collect_cpu_info() return void Simplify code flow a bit more in the process. No functional changes. Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20230921104220.GHZQweDKyaJmkYdt4f@fat_crate.local --- arch/x86/include/asm/cpu.h | 2 +- arch/x86/kernel/cpu/microcode/amd.c | 4 +--- arch/x86/kernel/cpu/microcode/intel.c | 12 +++--------- arch/x86/kernel/cpu/microcode/internal.h | 2 +- 4 files changed, 6 insertions(+), 14 deletions(-) diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index 4066dd3734ba..581ecfbaf134 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -75,7 +75,7 @@ extern __noendbr void cet_disable(void); struct cpu_signature; -void intel_collect_cpu_info(struct cpu_signature *sig); +void intel_collect_cpu_info(int unused, struct cpu_signature *sig); static inline bool intel_cpu_signatures_match(unsigned int s1, unsigned int p1, unsigned int s2, unsigned int p2) diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c index 0f15e82a536c..5d1c2a716456 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -632,7 +632,7 @@ void reload_ucode_amd(unsigned int cpu) } } -static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig) +static void collect_cpu_info_amd(int cpu, struct cpu_signature *csig) { struct cpuinfo_x86 *c = &cpu_data(cpu); struct ucode_cpu_info *uci = ucode_cpu_info + cpu; @@ -650,8 +650,6 @@ static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig) uci->mc = p->data; pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev); - - return 0; } static enum ucode_state apply_microcode_amd(int cpu) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index 3817bb2ad6ac..0eff86a5ab8f 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -66,7 +66,7 @@ static inline unsigned int exttable_size(struct extended_sigtable *et) return et->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE; } -void intel_collect_cpu_info(struct cpu_signature *sig) +void intel_collect_cpu_info(int unused, struct cpu_signature *sig) { sig->sig = cpuid_eax(1); sig->pf = 0; @@ -363,7 +363,7 @@ static __init struct microcode_intel *get_microcode_blob(struct ucode_cpu_info * if (!(cp.data && cp.size)) return NULL; - intel_collect_cpu_info(&uci->cpu_sig); + intel_collect_cpu_info(0, &uci->cpu_sig); return scan_microcode(cp.data, cp.size, uci); } @@ -424,12 +424,6 @@ void reload_ucode_intel(void) apply_microcode_early(&uci); } -static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) -{ - intel_collect_cpu_info(csig); - return 0; -} - static enum ucode_state apply_microcode_late(int cpu) { struct ucode_cpu_info *uci = ucode_cpu_info + cpu; @@ -592,7 +586,7 @@ static void finalize_late_load(int result) static struct microcode_ops microcode_intel_ops = { .request_microcode_fw = request_microcode_fw, - .collect_cpu_info = collect_cpu_info, + .collect_cpu_info = intel_collect_cpu_info, .apply_microcode = apply_microcode_late, .finalize_late_load = finalize_late_load, }; diff --git a/arch/x86/kernel/cpu/microcode/internal.h b/arch/x86/kernel/cpu/microcode/internal.h index 051b7956d4fd..b3753025cd4a 100644 --- a/arch/x86/kernel/cpu/microcode/internal.h +++ b/arch/x86/kernel/cpu/microcode/internal.h @@ -30,7 +30,7 @@ struct microcode_ops { * See also the "Synchronization" section in microcode_core.c. */ enum ucode_state (*apply_microcode)(int cpu); - int (*collect_cpu_info)(int cpu, struct cpu_signature *csig); + void (*collect_cpu_info)(int cpu, struct cpu_signature *csig); void (*finalize_late_load)(int result); };
On Tue, Oct 03, 2023 at 04:14:39PM +0200, Borislav Petkov wrote: > On Mon, Sep 25, 2023 at 12:47:16PM +0200, Thomas Gleixner wrote: > > Eew. That's a function exposed to code outside of microcode and just > > grows that unused argument for no value and you obviously forgot to > > fixup the extern callsite :) > > It's used on AMD. Adding the below to the pile. And now that I look at it again, exposing that "unused" arg is uglier than having the local wrapper in the loader code. Yeah, lemme zap that.
--- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -425,21 +425,7 @@ void reload_ucode_intel(void) static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) { - struct cpuinfo_x86 *c = &cpu_data(cpu_num); - unsigned int val[2]; - - memset(csig, 0, sizeof(*csig)); - - csig->sig = cpuid_eax(0x00000001); - - if ((c->x86_model >= 5) || (c->x86 > 6)) { - /* get processor flags from MSR 0x17 */ - rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); - csig->pf = 1 << ((val[1] >> 18) & 7); - } - - csig->rev = c->microcode; - + intel_collect_cpu_info(csig); return 0; }