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Sat, 12 Aug 2023 07:26:00 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Sat, 12 Aug 2023 07:25:57 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Sat, 12 Aug 2023 07:25:57 -0700 Received: from IPBU-BLR-SERVER1.marvell.com (IPBU-BLR-SERVER1.marvell.com [10.28.8.41]) by maili.marvell.com (Postfix) with ESMTP id 074A43F7041; Sat, 12 Aug 2023 07:25:53 -0700 (PDT) From: Gowthami Thiagarajan To: , , , , , , , CC: , , , Gowthami Thiagarajan Subject: [PATCH v2 4/6] dt-bindings: perf: Add Marvell Odyssey LLC-TAD pmu Date: Sat, 12 Aug 2023 19:55:16 +0530 Message-ID: <20230812142518.778259-5-gthiagarajan@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230812142518.778259-1-gthiagarajan@marvell.com> References: <20230812142518.778259-1-gthiagarajan@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: xlue4Tfpag-saTc5X1piSGALROoaBXFw X-Proofpoint-ORIG-GUID: xlue4Tfpag-saTc5X1piSGALROoaBXFw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-12_14,2023-08-10_01,2023-05-22_02 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1774038922863408283 X-GMAIL-MSGID: 1774038922863408283 Add binding documentation for Marvell Odyssey LLC-TAD performance monitor unit Signed-off-by: Gowthami Thiagarajan --- v1->v2 - Changed DT binding file name to match with compatible - Added respective document in MAINTAINERS .../perf/marvell,odyssey-tad-pmu.yaml | 63 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/marvell,odyssey-tad-pmu.yaml diff --git a/Documentation/devicetree/bindings/perf/marvell,odyssey-tad-pmu.yaml b/Documentation/devicetree/bindings/perf/marvell,odyssey-tad-pmu.yaml new file mode 100644 index 000000000000..a1b9ee71e5f7 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/marvell,odyssey-tad-pmu.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/marvell,odyssey-tad-pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Odyssey LLC-TAD performance monitor + +maintainers: + - Gowthami Thiagarajan + +description: | + The Tag-and-Data units (TADs) maintain coherence and contain CN10K + shared on-chip last level cache (LLC). The tad pmu measures the + performance of last-level cache. Each tad pmu supports up to eight + counters. + + The DT setup comprises of number of tad blocks, the sizes of pmu + regions, tad blocks and overall base address of the HW. + +properties: + compatible: + const: marvell,odyssey-tad-pmu + + reg: + maxItems: 1 + + marvell,tad-cnt: + description: specifies the number of tads on the soc + $ref: /schemas/types.yaml#/definitions/uint32 + + marvell,tad-page-size: + description: specifies the size of each tad page + $ref: /schemas/types.yaml#/definitions/uint32 + + marvell,tad-pmu-page-size: + description: specifies the size of page that the pmu uses + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - reg + - marvell,tad-cnt + - marvell,tad-page-size + - marvell,tad-pmu-page-size + +additionalProperties: false + +examples: + - | + + tad { + #address-cells = <2>; + #size-cells = <2>; + + pmu@87e22b030000 { + compatible = "marvell,odyssey-tad-pmu"; + reg = <0x87e2 0x2b030000 0x0 0x1000>; + marvell,tad-cnt = <1>; + marvell,tad-page-size = <0x1000>; + marvell,tad-pmu-page-size = <0x1000>; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 70d2971b93d4..b9da1affe8b9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12591,6 +12591,7 @@ M: Bharat Bhushan M: Linu Cherian M: George Cherian S: Supported +F: Documentation/devicetree/bindings/perf/marvell,odyssey-tad-pmu.yaml F: drivers/perf/marvell_odyssey_tad_pmu.c MARVELL PRESTERA ETHERNET SWITCH DRIVER