From patchwork Fri Aug 11 20:22:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Apurva Nandan X-Patchwork-Id: 134696 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b824:0:b0:3f2:4152:657d with SMTP id z4csp1359870vqi; Fri, 11 Aug 2023 14:15:41 -0700 (PDT) X-Google-Smtp-Source: AGHT+IES4fSwBgdpIVYMV5wocboSHtB9NQVWcwE/N3A1E5ZO8Io9LqmGTmI2zd5lyF5/fAPApFV+ X-Received: by 2002:a05:6a21:35c8:b0:13f:bc16:c360 with SMTP id ba8-20020a056a2135c800b0013fbc16c360mr3175689pzc.32.1691788541688; Fri, 11 Aug 2023 14:15:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691788541; cv=none; d=google.com; s=arc-20160816; b=klyweQiau2uf084Po+NgXdqTnIE57nxrSGUqrqZGi1yfI2zNE8h/uMFbyzabvDk+0K dmwXKWERBFR+QlhwO/mUrBfLMlTozlRR5pKjqryrxmyl8AKUxrqsuYeqcsxYxzcb24OG hjuCjeo891J+ZeEDJuiDZ2IuyUwbXmNmDi25aqz7r1xnvviywMy7n9CbL+BgiXexjLx6 wTG6oFV6RvV0vRa2aQcA+ooICZQBpZGIdWQO89B3ydcc1cIldf3qH68VLV2e15K3TLUY 6eY5yu8uuhfy+t2RiAmtySowBlKcRccwGVQS0b73PpRy88+4by/pvgM4Gyz/4qBX+5xI sxVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=7uy881CPSc17u9wCWHAD3b4qarmqqGagl/b+JVR36o8=; fh=QpIR97VuIuAnwAHDm7g1FQzTousV1BVvrw6/u5lFi4c=; b=hg+Uopw9fgPqVP71eGnfzLdEQ0sb5hyGNDmzG7/da48LdKQ/81R0wACHC0ZYxTyixb /+HfhGma0ixtkghFNDcJR3zOjFDNUBjFbJFkflCZOFSSbhjBAJnn3MU2cTkQHdbrNi/J 7ENinh7VsYyidj2vBK/kkW6ETWd7v0kkGAVGla0T2LNDKN/bBg8ZIV6/5/iGbTTmVleq I0VCvxIZ5OotGiE70EiHgEHe+aWSCXySVjYBRf4myP1YTK2M1EocutHrS6R6PxgPe6hn vfoe12lb75YkWcMdMsm4AiyxvZ5WLbZh6P+M8ncmkPweKi5bxpwnPU24gNfJXSmRP4fp aGWw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=a4BMJp6g; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v135-20020a63618d000000b0056554b240f8si4075798pgb.175.2023.08.11.14.15.28; Fri, 11 Aug 2023 14:15:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=a4BMJp6g; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235796AbjHKUXa (ORCPT + 99 others); Fri, 11 Aug 2023 16:23:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234859AbjHKUX2 (ORCPT ); Fri, 11 Aug 2023 16:23:28 -0400 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CEF97E4D; Fri, 11 Aug 2023 13:23:19 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 37BKNEkK085120; Fri, 11 Aug 2023 15:23:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691785394; bh=7uy881CPSc17u9wCWHAD3b4qarmqqGagl/b+JVR36o8=; h=From:To:Subject:Date:In-Reply-To:References; b=a4BMJp6gAAPjgL8Gxd6yU29IZADai6puKj4rk3GcGDMTfixiTxpKnIVTHy2e7zc10 ASdq1ryVw4xCwSMx/M64HRpaZI6s8uwFW1/ftzCjreWBXCyNc2acieZCxTsQSrQG4i 4RXrCaB3pKoQiLlbKwzZC5bSq6fw9Vl+9kXqQKDk= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 37BKNEpe124360 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 11 Aug 2023 15:23:14 -0500 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 11 Aug 2023 15:23:14 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 11 Aug 2023 15:23:14 -0500 Received: from TI.dhcp.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 37BKMr58055948; Fri, 11 Aug 2023 15:23:11 -0500 From: Apurva Nandan To: Apurva Nandan , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , Hari Nagalla , Udit Kumar Subject: [PATCH v3 5/5] arm64: dts : ti: k3-j721s2-som-p0: Add DDR carveout memory nodes for C71x DSPs Date: Sat, 12 Aug 2023 01:52:52 +0530 Message-ID: <20230811202252.3586926-6-a-nandan@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230811202252.3586926-1-a-nandan@ti.com> References: <20230811202252.3586926-1-a-nandan@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773968861674340975 X-GMAIL-MSGID: 1773968861674340975 Two carveout reserved memory nodes each have been added for each of the C71x DSP for the TI J721S2 EVM boards. These nodes are assigned to the respective rproc device nodes as well. The first region will be used as the DMA pool for the rproc device, and the second region will furnish the static carveout regions for the firmware memory. The current carveout addresses and sizes are defined statically for each device. The C71x DSP processor supports a MMU called CMMU, but is not currently supported and as such requires the exact memory used by the firmware to be set-aside. Signed-off-by: Hari Nagalla Signed-off-by: Apurva Nandan --- arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 52 ++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi index 970340ff2c0a..dcad372620b1 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi @@ -102,6 +102,30 @@ main_r5fss1_core1_memory_region: r5f-memory@a5100000 { no-map; }; + c71_0_dma_memory_region: c71-dma-memory@a6000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa6000000 0x00 0x100000>; + no-map; + }; + + c71_0_memory_region: c71-memory@a6100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa6100000 0x00 0xf00000>; + no-map; + }; + + c71_1_dma_memory_region: c71-dma-memory@a7000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa7000000 0x00 0x100000>; + no-map; + }; + + c71_1_memory_region: c71-memory@a7100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa7100000 0x00 0xf00000>; + no-map; + }; + rtos_ipc_memory_region: ipc-memories@a8000000 { reg = <0x00 0xa8000000 0x00 0x01c00000>; alignment = <0x1000>; @@ -272,6 +296,20 @@ mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 { }; }; +&mailbox0_cluster4 { + status = "okay"; + interrupts = <420>; + mbox_c71_0: mbox-c71-0 { + ti,mbox-rx = <0 0 0>; + ti,mbox-tx = <1 0 0>; + }; + + mbox_c71_1: mbox-c71-1 { + ti,mbox-rx = <2 0 0>; + ti,mbox-tx = <3 0 0>; + }; +}; + &mcu_r5fss0_core0 { mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; memory-region = <&mcu_r5fss0_core0_dma_memory_region>, @@ -307,3 +345,17 @@ &main_r5fss1_core1 { memory-region = <&main_r5fss1_core1_dma_memory_region>, <&main_r5fss1_core1_memory_region>; }; + +&c71_0 { + status = "okay"; + mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; + memory-region = <&c71_0_dma_memory_region>, + <&c71_0_memory_region>; +}; + +&c71_1 { + status = "okay"; + mboxes = <&mailbox0_cluster4>, <&mbox_c71_1>; + memory-region = <&c71_1_dma_memory_region>, + <&c71_1_memory_region>; +};