From patchwork Fri Aug 11 09:58:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: maobibo X-Patchwork-Id: 134415 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b824:0:b0:3f2:4152:657d with SMTP id z4csp1004359vqi; Fri, 11 Aug 2023 04:06:14 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFdE5n07DntDgchc5qGUYdOOtRzstTQkuomG1PrIvBt3FrhioDPTIS1D1VZqApObQ0IQSit X-Received: by 2002:a05:6402:14d7:b0:523:4d60:71c0 with SMTP id f23-20020a05640214d700b005234d6071c0mr1412817edx.33.1691751974289; Fri, 11 Aug 2023 04:06:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691751974; cv=none; d=google.com; s=arc-20160816; b=Kwplw4xLN/Dz/WDKnrrj7hBjiWY9lvaftF9lsShGMGtSdNW6F3wNXFlg0OF1uOCRwC ed973nX5DooVQxaiKk4UyWJN4pZLrK4sEHPlNOGpBr15znu9BesYqDTcPmKD+7PvqMR2 2NlbeaseGTxQRn9AoYf98ZlckoL5U6jRbFJ46SU/0CZG9l5+7/7i415U+h+cRpctV3um InxCRICIfgS2tDKlbWFzZcV30LKgIzW2nTFpNG1qa9L5aFe4b973WI2Ls2ryDwqV2WRz keFIBbyxMXClup9IOnL6xoTxT8VknN9w5Ixjip/2HTek3tIntcoyLk9ryA3I2AA29/CJ OCGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Te9+OKrsd/pfAo81K6/WLXhkm0rVgfwGKe7VCPZXkOY=; fh=Y3+CR8DbvrL4KzdH0gKbA6cLtkHm4Wgbs811/TdZ+7Y=; b=cDfQkAkb8yfjwkY2+jDCDoiWcbEr7eutniiuun7M/LBfX5GUKhk6UjIxqlaXf8hw36 t8Jk3+u2PoVjlC/sJcbprYuoPigfNmQYjKVC1Jwo+AkbibUHk91HYHB1PMpaNHiEDvDV ZkDxb9k38cjb9PFU0Y/4e2d+/QFfHOBquzsWmKMA1S3WvsFcqG/QXDc2QQkl4eAsuKXj 409aM4fprx6du24Eb7tFlS0KJCFDV6F4hplaptxI5Oq5+X/FhxK86qmK30Mwu2SL/C76 XWpPHifngTdHO/f2bi2uCTvDvE3dKtVY7VDDwiOvVl/BgFuZGsVyV3hk/yzJ8MuPQQcK XDZw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v13-20020a056402184d00b00523384d70eesi3245395edy.416.2023.08.11.04.05.18; Fri, 11 Aug 2023 04:06:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235248AbjHKJ6O (ORCPT + 99 others); Fri, 11 Aug 2023 05:58:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39142 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235211AbjHKJ6N (ORCPT ); Fri, 11 Aug 2023 05:58:13 -0400 Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id C1C1D2723 for ; Fri, 11 Aug 2023 02:58:11 -0700 (PDT) Received: from loongson.cn (unknown [10.2.9.158]) by gateway (Coremail) with SMTP id _____8DxBfEyBtZkO4AVAA--.45918S3; Fri, 11 Aug 2023 17:58:10 +0800 (CST) Received: from kvm-1-158.loongson.cn (unknown [10.2.9.158]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Dx5swtBtZkyshUAA--.59296S4; Fri, 11 Aug 2023 17:58:10 +0800 (CST) From: Bibo Mao To: Huacai Chen , Marc Zyngier Cc: Jiaxun Yang , Jianmin Lv , linux-kernel@vger.kernel.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v6 2/2] irqchip/loongson-eiointc: Simplify irq routing on some platforms Date: Fri, 11 Aug 2023 17:58:05 +0800 Message-Id: <20230811095805.2974722-3-maobibo@loongson.cn> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20230811095805.2974722-1-maobibo@loongson.cn> References: <20230811095805.2974722-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Dx5swtBtZkyshUAA--.59296S4 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBj93XoWxKFykCr15Gr4xtF1fXFW3CFX_yoW7GF43pF WUGas0qr48Xay5WrZakw4DZFyayr93X3yDtF4fua97AFWY9a1UKF1FyFnrZF1jk34UAF1Y yF45XFy8uFn8A3XCm3ZEXasCq-sJn29KB7ZKAUJUUUUr529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUU9Fb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2kKe7AKxVWUXVWUAwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07 AIYIkI8VC2zVCFFI0UMc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWU tVWrXwAv7VC2z280aVAFwI0_Gr0_Cr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7V AKI48JMxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMxCIbckI1I0E14v2 6r1Y6r17MI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17 CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r4j6ryUMIIF 0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIx AIcVC2z280aVAFwI0_Gr0_Cr1lIxAIcVC2z280aVCY1x0267AKxVW8JVW8JrUvcSsGvfC2 KfnxnUUI43ZEXa7IU8EeHDUUUUU== X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773930517986899367 X-GMAIL-MSGID: 1773930517986899367 Some LoongArch systems have only one eiointc node such as 3A5000/2K2000 and qemu virt-machine. If there is only one eiointc node, all cpus can access eiointc registers directly; if there is multiple eiointc nodes, each cpu can only access eiointc belonging to specified node group, so anysend or ipi needs to be used to configure irq routing. IRQ routing is simple on such systems with one node, method like anysend is not necessary. This patch provides simpile IRQ routing method for systems with one eiointc node, and is tested on 3A5000 board and qemu virt-machine. Signed-off-by: Bibo Mao --- drivers/irqchip/irq-loongson-eiointc.c | 80 ++++++++++++++++++++++++-- 1 file changed, 74 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-loongson-eiointc.c b/drivers/irqchip/irq-loongson-eiointc.c index 1623cd779175..f15e119cc05c 100644 --- a/drivers/irqchip/irq-loongson-eiointc.c +++ b/drivers/irqchip/irq-loongson-eiointc.c @@ -127,6 +127,48 @@ static int eiointc_set_irq_affinity(struct irq_data *d, const struct cpumask *af return IRQ_SET_MASK_OK; } +static int eiointc_single_set_irq_affinity(struct irq_data *d, + const struct cpumask *affinity, bool force) +{ + unsigned int cpu; + unsigned long flags; + uint32_t vector, regaddr, data, coremap; + struct cpumask mask; + struct eiointc_priv *priv = d->domain->host_data; + + cpumask_and(&mask, affinity, cpu_online_mask); + cpumask_and(&mask, &mask, &priv->cpuspan_map); + if (cpumask_empty(&mask)) + return -EINVAL; + + cpu = cpumask_first(&mask); + vector = d->hwirq; + regaddr = EIOINTC_REG_ENABLE + ((vector >> 5) << 2); + data = ~BIT(vector & 0x1F); + coremap = BIT(cpu_logical_map(cpu) % CORES_PER_EIO_NODE); + + /* + * simplify for platform with only one eiointc node + * access eiointc registers directly rather than + * use any_send method here + */ + raw_spin_lock_irqsave(&affinity_lock, flags); + iocsr_write32(EIOINTC_ALL_ENABLE & data, regaddr); + /* + * get irq route info for continuous 4 vectors + * and set affinity for specified vector + */ + data = iocsr_read32(EIOINTC_REG_ROUTE + (vector & ~3)); + data &= ~(0xff << ((vector & 3) * 8)); + data |= coremap << ((vector & 3) * 8); + iocsr_write32(data, EIOINTC_REG_ROUTE + (vector & ~3)); + iocsr_write32(EIOINTC_ALL_ENABLE, regaddr); + raw_spin_unlock_irqrestore(&affinity_lock, flags); + + irq_data_update_effective_affinity(d, cpumask_of(cpu)); + return IRQ_SET_MASK_OK; +} + static int eiointc_index(int node) { int i; @@ -235,22 +277,39 @@ static struct irq_chip eiointc_irq_chip = { .irq_set_affinity = eiointc_set_irq_affinity, }; +static struct irq_chip eiointc_irq_chip_single = { + .name = "EIOINTC-S", + .irq_ack = eiointc_ack_irq, + .irq_mask = eiointc_mask_irq, + .irq_unmask = eiointc_unmask_irq, +#ifdef CONFIG_SMP + .irq_set_affinity = eiointc_single_set_irq_affinity, +#endif +}; + static int eiointc_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *arg) { int ret; unsigned int i, type; unsigned long hwirq = 0; - struct eiointc *priv = domain->host_data; + struct eiointc_priv *priv = domain->host_data; + struct irq_chip *chip; ret = irq_domain_translate_onecell(domain, arg, &hwirq, &type); if (ret) return ret; - for (i = 0; i < nr_irqs; i++) { - irq_domain_set_info(domain, virq + i, hwirq + i, &eiointc_irq_chip, + /* + * use simple irq routing method on single eiointc node + */ + if ((nr_pics == 1) && (nodes_weight(priv->node_map) == 1)) + chip = &eiointc_irq_chip_single; + else + chip = &eiointc_irq_chip; + for (i = 0; i < nr_irqs; i++) + irq_domain_set_info(domain, virq + i, hwirq + i, chip, priv, handle_edge_irq, NULL, NULL); - } return 0; } @@ -307,6 +366,7 @@ static void eiointc_resume(void) int i, j; struct irq_desc *desc; struct irq_data *irq_data; + struct irq_chip *chip; eiointc_router_init(0); @@ -316,7 +376,8 @@ static void eiointc_resume(void) if (desc && desc->handle_irq && desc->handle_irq != handle_bad_irq) { raw_spin_lock(&desc->lock); irq_data = irq_domain_get_irq_data(eiointc_priv[i]->eiointc_domain, irq_desc_get_irq(desc)); - eiointc_set_irq_affinity(irq_data, irq_data->common->affinity, 0); + chip = irq_data_get_irq_chip(irq_data); + chip->irq_set_affinity(irq_data, irq_data->common->affinity, 0); raw_spin_unlock(&desc->lock); } } @@ -494,7 +555,14 @@ static int __init eiointc_of_init(struct device_node *of_node, priv->node = 0; priv->domain_handle = of_node_to_fwnode(of_node); - ret = eiointc_init(priv, parent_irq, 0); + /* + * 2k0500 and 2k2000 has only one eiointc node + * set nodemap as 1 for simple irq routing + * + * Fixme: what about future embedded boards with more than 4 cpus? + * nodemap and node need be added in dts like acpi table + */ + ret = eiointc_init(priv, parent_irq, 1); if (ret < 0) goto out_free_priv;