Message ID | 20230810061140.15608-2-quic_kbajaj@quicinc.com |
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State | New |
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Thu, 10 Aug 2023 06:12:07 +0000 Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 37A6C6qf020929 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 10 Aug 2023 06:12:06 GMT Received: from hu-kbajaj-hyd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Wed, 9 Aug 2023 23:12:02 -0700 From: Komal Bajaj <quic_kbajaj@quicinc.com> To: <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <srinivas.kandagatla@linaro.org> CC: <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Komal Bajaj <quic_kbajaj@quicinc.com>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Subject: [PATCH 1/6] dt-bindings: cache: qcom,llcc: Add LLCC compatible for QDU1000/QRU1000 Date: Thu, 10 Aug 2023 11:41:35 +0530 Message-ID: <20230810061140.15608-2-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230810061140.15608-1-quic_kbajaj@quicinc.com> References: <20230810061140.15608-1-quic_kbajaj@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 6FvIA9OWJPtRg4KawGfcFsX0L51Nx8M8 X-Proofpoint-ORIG-GUID: 6FvIA9OWJPtRg4KawGfcFsX0L51Nx8M8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-08-10_04,2023-08-09_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 malwarescore=0 adultscore=0 phishscore=0 mlxlogscore=937 mlxscore=0 spamscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 clxscore=1015 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2306200000 definitions=main-2308100051 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773826978941662878 X-GMAIL-MSGID: 1773826978941662878 |
Series |
soc: qcom: llcc: Add support for QDU1000/QRU1000
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Commit Message
Komal Bajaj
Aug. 10, 2023, 6:11 a.m. UTC
Add LLCC compatible for QDU1000/QRU1000 SoCs and add optional nvmem-cells and nvmem-cell-names properties to support multiple configurations for multi channel DDR. Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.41.0
Comments
On Thu, 10 Aug 2023 11:41:35 +0530, Komal Bajaj wrote: > Add LLCC compatible for QDU1000/QRU1000 SoCs and add optional > nvmem-cells and nvmem-cell-names properties to support multiple > configurations for multi channel DDR. > > Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 10 ++++++++++ > 1 file changed, 10 insertions(+) > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230810061140.15608-2-quic_kbajaj@quicinc.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 8/10/2023 12:50 PM, Rob Herring wrote: > On Thu, 10 Aug 2023 11:41:35 +0530, Komal Bajaj wrote: >> Add LLCC compatible for QDU1000/QRU1000 SoCs and add optional >> nvmem-cells and nvmem-cell-names properties to support multiple >> configurations for multi channel DDR. >> >> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> >> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> --- >> Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 10 ++++++++++ >> 1 file changed, 10 insertions(+) >> > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > > > doc reference errors (make refcheckdocs): > > See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230810061140.15608-2-quic_kbajaj@quicinc.com > > The base for the series is generally the latest rc1. A different dependency > should be noted in *this* patch. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit after running the above command yourself. Note > that DT_SCHEMA_FILES can be set to your schema file to speed up checking > your schema. However, it must be unset to test all examples with your schema. Hi Rob, I did run the same steps locally after upgrading dtschema too, but it didn't reported any kind of error. Here also, error is not mentioned, can you please state what's the error reported with this patch? Thanks Komal >
On Thu, Aug 10, 2023 at 4:27 AM Komal Bajaj <quic_kbajaj@quicinc.com> wrote: > > > > On 8/10/2023 12:50 PM, Rob Herring wrote: > > On Thu, 10 Aug 2023 11:41:35 +0530, Komal Bajaj wrote: > >> Add LLCC compatible for QDU1000/QRU1000 SoCs and add optional > >> nvmem-cells and nvmem-cell-names properties to support multiple > >> configurations for multi channel DDR. > >> > >> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> > >> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > >> --- > >> Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 10 ++++++++++ > >> 1 file changed, 10 insertions(+) > >> > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > > > yamllint warnings/errors: > > > > dtschema/dtc warnings/errors: > > > > > > doc reference errors (make refcheckdocs): > > > > See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230810061140.15608-2-quic_kbajaj@quicinc.com > > > > The base for the series is generally the latest rc1. A different dependency > > should be noted in *this* patch. > > > > If you already ran 'make dt_binding_check' and didn't see the above > > error(s), then make sure 'yamllint' is installed and dt-schema is up to > > date: > > > > pip3 install dtschema --upgrade > > > > Please check and re-submit after running the above command yourself. Note > > that DT_SCHEMA_FILES can be set to your schema file to speed up checking > > your schema. However, it must be unset to test all examples with your schema. > > Hi Rob, > I did run the same steps locally after upgrading dtschema too, but it > didn't reported any kind of error. > Here also, error is not mentioned, can you please state what's the error > reported with this patch? No error. It's a problem with the bot's CI job. Rob
diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index 44892aa589fd..580f9a97ddf7 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -20,6 +20,7 @@ description: | properties: compatible: enum: + - qcom,qdu1000-llcc - qcom,sc7180-llcc - qcom,sc7280-llcc - qcom,sc8180x-llcc @@ -44,6 +45,14 @@ properties: interrupts: maxItems: 1 + nvmem-cells: + items: + - description: Reference to an nvmem node for multi channel DDR + + nvmem-cell-names: + items: + - const: multi-chan-ddr + required: - compatible - reg @@ -92,6 +101,7 @@ allOf: compatible: contains: enum: + - qcom,qdu1000-llcc - qcom,sc8180x-llcc - qcom,sc8280xp-llcc then: