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[2620:137:e000::1:20]) by mx.google.com with ESMTP id qu7-20020a170907110700b0099cd371dd90si433648ejb.928.2023.08.09.18.41.39; Wed, 09 Aug 2023 18:42:02 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=xZWk7NZt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231886AbjHJAig (ORCPT + 99 others); Wed, 9 Aug 2023 20:38:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59242 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231224AbjHJAia (ORCPT ); Wed, 9 Aug 2023 20:38:30 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 439DA1736; Wed, 9 Aug 2023 17:38:30 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 37A0cITm005311; Wed, 9 Aug 2023 19:38:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691627898; bh=KuRrfwlrYN7ck4e9lXUh/hH/ruzG2lPDTZNjQtzdsy8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=xZWk7NZtTU4lQudteA0k0GlJj3j+YDicwzfvF3+hjuutfA9OVKSv0kAHvL1j+nnr/ X1d2M7muJVfm877iVW3XKFaeoRVToigqawSg3UTT7+iPZ69dSX1UrYcGNBmnnbe164 MGVYzMR9C0CdpnzNFSa5zjKfeovqFcd0mFlNbAgQ= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 37A0cIuD061475 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 9 Aug 2023 19:38:18 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 9 Aug 2023 19:38:18 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Aug 2023 19:38:18 -0500 Received: from lelv0327.itg.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 37A0cGF5014775; Wed, 9 Aug 2023 19:38:17 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dhruva Gole CC: , , , Andrew Davis Subject: [PATCH v3 02/13] arm64: dts: ti: k3-j7200: Enable SDHCI nodes at the board level Date: Wed, 9 Aug 2023 19:38:03 -0500 Message-ID: <20230810003814.85450-3-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230810003814.85450-1-afd@ti.com> References: <20230810003814.85450-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773804424612330475 X-GMAIL-MSGID: 1773804424612330475 SDHCI nodes defined in the top-level J7200 SoC dtsi files are incomplete and will not be functional unless they are extended. As the attached SD/eMMC is only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 2 ++ arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts index 92a5414911729..dee9056f56051 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts @@ -326,6 +326,7 @@ exp3: gpio@20 { &main_sdhci0 { /* eMMC */ + status = "okay"; non-removable; ti,driver-strength-ohm = <50>; disable-wp; @@ -333,6 +334,7 @@ &main_sdhci0 { &main_sdhci1 { /* SD card */ + status = "okay"; pinctrl-0 = <&main_mmc1_pins_default>; pinctrl-names = "default"; vmmc-supply = <&vdd_mmc1>; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi index 6eaade5aeb423..5d7542ba41b93 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi @@ -654,6 +654,7 @@ main_sdhci0: mmc@4f80000 { mmc-hs200-1_8v; mmc-hs400-1_8v; dma-coherent; + status = "disabled"; }; main_sdhci1: mmc@4fb0000 { @@ -677,6 +678,7 @@ main_sdhci1: mmc@4fb0000 { ti,clkbuf-sel = <0x7>; ti,trm-icp = <0x8>; dma-coherent; + status = "disabled"; }; serdes_wiz0: wiz@5060000 {