[3/3] arm64: dts: ti: k3-j7200-thermal: Add cooling maps and cpu_alert trip at 75C

Message ID 20230809173905.1844132-4-a-nandan@ti.com
State New
Headers
Series Add support for thermal mitigation for K3 J7200 SoC |

Commit Message

Apurva Nandan Aug. 9, 2023, 5:39 p.m. UTC
  From: Keerthy <j-keerthy@ti.com>

Add cooling maps and mpu_alert trip at 75C

Note: mpu_alert trip value should adjusted based on the system load and
performance needs.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
  

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi
index e7e3a643a6f0..eeb596727d48 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-thermal.dtsi
@@ -28,6 +28,20 @@  mpu_crit: mpu-crit {
 				hysteresis = <2000>; /* milliCelsius */
 				type = "critical";
 			};
+
+			mpu_alert0: mpu_alert {
+				temperature = <75000>; /* millicelsius */
+				hysteresis = <5000>; /* millicelsius */
+				type = "passive";
+			};
+		};
+
+		cpu_cooling_maps: cooling-maps {
+			map0 {
+				trip = <&mpu_alert0>;
+				cooling-device =
+				<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+			};
 		};
 	};