From patchwork Tue Aug 8 17:11:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Shavit X-Patchwork-Id: 132787 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:c44e:0:b0:3f2:4152:657d with SMTP id w14csp2340638vqr; Tue, 8 Aug 2023 12:14:58 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE5/BkS8Za9pxCGDXzDmRbaJjoaYhz3DU2Xs26cXcN8uH/0iQfte0A2wEP11TJJllWslK1E X-Received: by 2002:a05:651c:1054:b0:2b9:a6a1:f20 with SMTP id x20-20020a05651c105400b002b9a6a10f20mr331443ljm.42.1691522098045; Tue, 08 Aug 2023 12:14:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691522098; cv=none; d=google.com; s=arc-20160816; b=ZdMniFx0XOdwUvcDLMGwBiwWpebrcGE/MZoDwqDI12YZUElPPMLgYOp0sCZfV25aMy OoJ4YROnq+CZ5qzVvFr0Tn1JkMveWBLcz2dJhbbQCrJwcUA7TRzbxtCtBFCQOoUwluNH cPwyU7SCK8sR5nH58iyrQ5W6038krE89ID9aHhnEBNfjYeobt4G0Bw/W96qot7ZHOFZq Yr0UNiYo3YAodkUyYN0CXrnmjtn8s8DGy03fbEd6suAeYk9J6gpO8NPzwmMtEYlcXA3s 32zK4lQwFS99WOwK5IZveXhX21g91tWXmYO3dIGh1jIK90GIkUS1WtFYvgGNE4C8NIbo 3nYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:dkim-signature; bh=QKyknDrmqeDKJaHmifWK+NJLcCP4GgY5YiM5ta6V6/0=; fh=51loh+OS6vr0QdvTi7t7xEP2VSRDvSfeMVfkb8abBBs=; b=elsO5JO0NA6sd2PmugdOeFeRBcNKJdPU6lFJvvssTnZbBhk0fEGw728CRMggeTK0cR w++BgnoUzqDiNLnt9fPym3hlBsLgX8FroSMg7l/cnDZeo5z4t+GbU+JwXjAaJ8bS0Q27 1d6MHPhWKPMIB6J8GIF/Ho6x8maQFnoX1s2tikM2dm0KcZ8bNHZxMB2CVAj/UW7iKv/7 SXO9nHsa4ZP6wKwVuccyDZRyRJ6OuSC6fjd62cfJKNQz7NNGH+xUOHymZvcfza0SGFEc 3Tfu+I9G/lySq22OgE9RCncS3XKQqlyUPkBpjp6dcy6g3cP8khalJ5ZrQqUICyg7fKFQ xuKA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=WwMaXIna; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f1-20020a170906138100b00992e50eafcfsi6738863ejc.772.2023.08.08.12.14.29; Tue, 08 Aug 2023 12:14:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20221208 header.b=WwMaXIna; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229791AbjHHS4h (ORCPT + 99 others); Tue, 8 Aug 2023 14:56:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232946AbjHHS4H (ORCPT ); Tue, 8 Aug 2023 14:56:07 -0400 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6011C16507F for ; Tue, 8 Aug 2023 10:15:01 -0700 (PDT) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-583c1903ad3so69809457b3.2 for ; Tue, 08 Aug 2023 10:15:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20221208; t=1691514900; x=1692119700; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=QKyknDrmqeDKJaHmifWK+NJLcCP4GgY5YiM5ta6V6/0=; b=WwMaXInaqPX1wMMj5Yhz5G9YHoRw6rp1SGvyqYJyXDfBLp8LxdjhAsW3ihlPEj7fl1 hXFPDl5MsCNhooIDYROY3B1tInoci/Ch73FoaGeVHh2j+hNo+xiTXirYiqoJB1n2uHpx QYEThOUYOPhc09sjq7UIUcRYKBAa4U2sHXdQdBU1L8zvaTWKs9EvltYfIPtryVBZEBLG DOkFY/e9PElHqxmj5RVcE8obMpinkAoM5xmSsSzD9NbY0b4V6L+BqqGP4fAG54SVKRhq axVg+3deF83AQQe696hvWnNKpzdp0dW/onGuNnMTgVGe2Lq4rSOnPCMRw8PoaezYBMKl c5JQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1691514900; x=1692119700; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=QKyknDrmqeDKJaHmifWK+NJLcCP4GgY5YiM5ta6V6/0=; b=DzFzytSzop4lFD/j/fDIUe8Ktmbl70oL/0YtYAMweC6/f2K/Wbr1b1GaUJ1A+1DZaW dB8du5Wi2OUXsaFqIWOGwpUqZjXb2nG7m5hdVqQ37+wDNb++kEDCdYvgbPnWCNT9AxSM /wfdu116wUsMUPH7VKDvD+m7g3xH76ozHYbTonPLfFXTNWOdyTCogG/kV3SMEujwPD11 iwheFxGDglK4FJAwBQ75Q7NIQAPI5mh8Q3Gv6rXC7vtOx2jOp5PFeM3yqG1eBzWoZd9M A3Eab7y1z0JylWa5nTLSpCoSSdiW1wcIrpNrmZw6bBiUWWVW+D/AWeDahoGJHM/f2ii0 6Cow== X-Gm-Message-State: AOJu0Yz6UAenMk5Btkcye64cTCUsa0x2ky+RObUDBNyhvVuqSS2ack6z FTuVktnwNndLmQglAmcNcC0KYnd5h8ZA X-Received: from mshavit.ntc.corp.google.com ([2401:fa00:95:20c:986a:71d7:3b1e:ac1d]) (user=mshavit job=sendgmr) by 2002:a81:404a:0:b0:577:3712:125d with SMTP id m10-20020a81404a000000b005773712125dmr4714ywn.4.1691514900718; Tue, 08 Aug 2023 10:15:00 -0700 (PDT) Date: Wed, 9 Aug 2023 01:11:57 +0800 In-Reply-To: <20230808171446.2187795-1-mshavit@google.com> Mime-Version: 1.0 References: <20230808171446.2187795-1-mshavit@google.com> X-Mailer: git-send-email 2.41.0.640.ga95def55d0-goog Message-ID: <20230809011204.v5.1.I67ab103c18d882aedc8a08985af1fba70bca084e@changeid> Subject: [PATCH v5 1/9] iommu/arm-smmu-v3: Move ctx_desc out of s1_cfg From: Michael Shavit To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: will@kernel.org, robin.murphy@arm.com, nicolinc@nvidia.com, jgg@nvidia.com, jean-philippe@linaro.org, Michael Shavit X-Spam-Status: No, score=-9.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,USER_IN_DEF_DKIM_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773689475340740480 X-GMAIL-MSGID: 1773689475340740480 s1_cfg describes the CD table that is inserted into an SMMU's STEs. It's weird for s1_cfg to also own ctx_desc which describes a CD that is inserted into that table. It is more appropriate for arm_smmu_domain to own ctx_desc. Reviewed-by: Jason Gunthorpe Reviewed-by: Nicolin Chen Signed-off-by: Michael Shavit --- (no changes since v2) Changes in v2: - Undo over-reaching column alignment change .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 2 +- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 23 ++++++++++--------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 6 +++-- 3 files changed, 17 insertions(+), 14 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index a5a63b1c947eb..968559d625c40 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -62,7 +62,7 @@ arm_smmu_share_asid(struct mm_struct *mm, u16 asid) return cd; } - smmu_domain = container_of(cd, struct arm_smmu_domain, s1_cfg.cd); + smmu_domain = container_of(cd, struct arm_smmu_domain, cd); smmu = smmu_domain->smmu; ret = xa_alloc(&arm_smmu_asid_xa, &new_asid, cd, diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 9b0dc35056019..bb277ff86f65f 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1869,7 +1869,7 @@ static void arm_smmu_tlb_inv_context(void *cookie) * careful, 007. */ if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { - arm_smmu_tlb_inv_asid(smmu, smmu_domain->s1_cfg.cd.asid); + arm_smmu_tlb_inv_asid(smmu, smmu_domain->cd.asid); } else { cmd.opcode = CMDQ_OP_TLBI_S12_VMALL; cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; @@ -1957,7 +1957,7 @@ static void arm_smmu_tlb_inv_range_domain(unsigned long iova, size_t size, if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { cmd.opcode = smmu_domain->smmu->features & ARM_SMMU_FEAT_E2H ? CMDQ_OP_TLBI_EL2_VA : CMDQ_OP_TLBI_NH_VA; - cmd.tlbi.asid = smmu_domain->s1_cfg.cd.asid; + cmd.tlbi.asid = smmu_domain->cd.asid; } else { cmd.opcode = CMDQ_OP_TLBI_S2_IPA; cmd.tlbi.vmid = smmu_domain->s2_cfg.vmid; @@ -2088,7 +2088,7 @@ static void arm_smmu_domain_free(struct iommu_domain *domain) mutex_lock(&arm_smmu_asid_lock); if (cfg->cdcfg.cdtab) arm_smmu_free_cd_tables(smmu_domain); - arm_smmu_free_asid(&cfg->cd); + arm_smmu_free_asid(&smmu_domain->cd); mutex_unlock(&arm_smmu_asid_lock); } else { struct arm_smmu_s2_cfg *cfg = &smmu_domain->s2_cfg; @@ -2107,13 +2107,14 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, u32 asid; struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg; + struct arm_smmu_ctx_desc *cd = &smmu_domain->cd; typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr = &pgtbl_cfg->arm_lpae_s1_cfg.tcr; - refcount_set(&cfg->cd.refs, 1); + refcount_set(&cd->refs, 1); /* Prevent SVA from modifying the ASID until it is written to the CD */ mutex_lock(&arm_smmu_asid_lock); - ret = xa_alloc(&arm_smmu_asid_xa, &asid, &cfg->cd, + ret = xa_alloc(&arm_smmu_asid_xa, &asid, cd, XA_LIMIT(1, (1 << smmu->asid_bits) - 1), GFP_KERNEL); if (ret) goto out_unlock; @@ -2126,23 +2127,23 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, if (ret) goto out_free_asid; - cfg->cd.asid = (u16)asid; - cfg->cd.ttbr = pgtbl_cfg->arm_lpae_s1_cfg.ttbr; - cfg->cd.tcr = FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, tcr->tsz) | + cd->asid = (u16)asid; + cd->ttbr = pgtbl_cfg->arm_lpae_s1_cfg.ttbr; + cd->tcr = FIELD_PREP(CTXDESC_CD_0_TCR_T0SZ, tcr->tsz) | FIELD_PREP(CTXDESC_CD_0_TCR_TG0, tcr->tg) | FIELD_PREP(CTXDESC_CD_0_TCR_IRGN0, tcr->irgn) | FIELD_PREP(CTXDESC_CD_0_TCR_ORGN0, tcr->orgn) | FIELD_PREP(CTXDESC_CD_0_TCR_SH0, tcr->sh) | FIELD_PREP(CTXDESC_CD_0_TCR_IPS, tcr->ips) | CTXDESC_CD_0_TCR_EPD1 | CTXDESC_CD_0_AA64; - cfg->cd.mair = pgtbl_cfg->arm_lpae_s1_cfg.mair; + cd->mair = pgtbl_cfg->arm_lpae_s1_cfg.mair; /* * Note that this will end up calling arm_smmu_sync_cd() before * the master has been added to the devices list for this domain. * This isn't an issue because the STE hasn't been installed yet. */ - ret = arm_smmu_write_ctx_desc(smmu_domain, 0, &cfg->cd); + ret = arm_smmu_write_ctx_desc(smmu_domain, 0, cd); if (ret) goto out_free_cd_tables; @@ -2152,7 +2153,7 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, out_free_cd_tables: arm_smmu_free_cd_tables(smmu_domain); out_free_asid: - arm_smmu_free_asid(&cfg->cd); + arm_smmu_free_asid(cd); out_unlock: mutex_unlock(&arm_smmu_asid_lock); return ret; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index dcab85698a4e2..f841383a55a35 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -599,7 +599,6 @@ struct arm_smmu_ctx_desc_cfg { struct arm_smmu_s1_cfg { struct arm_smmu_ctx_desc_cfg cdcfg; - struct arm_smmu_ctx_desc cd; u8 s1fmt; u8 s1cdmax; }; @@ -724,7 +723,10 @@ struct arm_smmu_domain { enum arm_smmu_domain_stage stage; union { - struct arm_smmu_s1_cfg s1_cfg; + struct { + struct arm_smmu_ctx_desc cd; + struct arm_smmu_s1_cfg s1_cfg; + }; struct arm_smmu_s2_cfg s2_cfg; };