Message ID | 20230809-tps6594-v5-4-485fd3d63670@ti.com |
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State | New |
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Wed, 9 Aug 2023 09:47:55 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 9 Aug 2023 09:47:55 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 379EltaX036909; Wed, 9 Aug 2023 09:47:55 -0500 From: Jai Luthra <j-luthra@ti.com> Date: Wed, 9 Aug 2023 20:17:05 +0530 Subject: [PATCH v5 4/6] arm64: dts: ti: k3-j784s4-evm: Fix interrupt ranges for TPS6594 PMIC MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20230809-tps6594-v5-4-485fd3d63670@ti.com> References: <20230809-tps6594-v5-0-485fd3d63670@ti.com> In-Reply-To: <20230809-tps6594-v5-0-485fd3d63670@ti.com> To: Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>, Tero Kristo <kristo@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org> CC: <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Esteban Blanc <eblanc@baylibre.com>, <jneanne@baylibre.com>, <aseketeli@baylibre.com>, <jpanis@baylibre.com>, <u-kumar1@ti.com>, <j-luthra@ti.com> X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; 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Series |
Add TPS6594 PMIC support on several boards
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Commit Message
Jai Luthra
Aug. 9, 2023, 2:47 p.m. UTC
From: Apelete Seketeli <aseketeli@baylibre.com> This patch fixes the interrupt range for TPS6594 PMIC on MCU/WAKEUP domain for RTC peripheral. Signed-off-by: Apelete Seketeli <aseketeli@baylibre.com> Signed-off-by: Esteban Blanc <eblanc@baylibre.com> Signed-off-by: Jai Luthra <j-luthra@ti.com> --- arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Comments
$subject is wrong. On 20:17-20230809, Jai Luthra wrote: > From: Apelete Seketeli <aseketeli@baylibre.com> > > This patch fixes the interrupt range for TPS6594 PMIC on MCU/WAKEUP > domain for RTC peripheral. > This needs to be rephrased - interrupt map for gpio wakeup interrupt controller is mapped in-correctly rather than indicating what caught the bug in the SoC description. Also missing: Fixes: 4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC") > Signed-off-by: Apelete Seketeli <aseketeli@baylibre.com> > Signed-off-by: Esteban Blanc <eblanc@baylibre.com> > Signed-off-by: Jai Luthra <j-luthra@ti.com> > --- > arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > index 740ee794d7b9..77a45f97e28b 100644 > --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi > @@ -107,7 +107,7 @@ wkup_gpio_intr: interrupt-controller@42200000 { > #interrupt-cells = <1>; > ti,sci = <&sms>; > ti,sci-dev-id = <177>; > - ti,interrupt-ranges = <16 928 16>; > + ti,interrupt-ranges = <16 960 16>; > }; > > /* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */ > > -- > 2.41.0 >
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi index 740ee794d7b9..77a45f97e28b 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi @@ -107,7 +107,7 @@ wkup_gpio_intr: interrupt-controller@42200000 { #interrupt-cells = <1>; ti,sci = <&sms>; ti,sci-dev-id = <177>; - ti,interrupt-ranges = <16 928 16>; + ti,interrupt-ranges = <16 960 16>; }; /* MCU_TIMERIO pad input CTRLMMR_MCU_TIMER*_CTRL registers */