From patchwork Tue Aug 8 16:46:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Fitzgerald X-Patchwork-Id: 132859 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:c44e:0:b0:3f2:4152:657d with SMTP id w14csp2378757vqr; Tue, 8 Aug 2023 13:31:54 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGLVDo8c97APLq32GIlQQGXBqs4j1EkM6TDKI0Ad4JJ5vRYLRHNOJDEZop2W5RZoJ+SPC0C X-Received: by 2002:a92:c5cf:0:b0:346:6afb:8351 with SMTP id s15-20020a92c5cf000000b003466afb8351mr798877ilt.9.1691526713902; Tue, 08 Aug 2023 13:31:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691526713; cv=none; d=google.com; s=arc-20160816; b=Jlhx6leCTSupMKqm1WcW/plCv/ESCNh4d2V+GFrt0YRdVJ77mpTJWmXWc19tDqPckA z72zk4yrhQYjdJgsJ+EM1HR+gYTWHj0vtgLuf7fcYbhTGdaAQOpAs3eurDSWaShYYMZJ +7Vkl3aOV1vEn1rKcq+z6VoSP7L4nRKnQEtM/Nx1DWhVdsjTLGjn19ZQpY3QSsp33Lal vEKH13eh3Kxlde5O4voG3zm3IT5FrQrV/UOIHjUj5EDcd8vN2TDAlf9Tnj/kXn8yZc4S I1qhAxX1itJHleQxTW4Y+WgCP9tu+xFDsOcLq0k2uhYZNW5wgYdE3UxW94egn0QXBaGV d5Xg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Mt28dTgZ7PN6kO/FpAGHcn+lAjxM4yoMpXnoYmoEICM=; fh=P0QvHlMMFJbJCslH/dmoAyQXUbc/W4z1rDtGQDk5OTc=; b=FHspzzHoavt7hnn8Fo+z3cVliTWIyc8aF1n6nlcwNe3YEgFfmLhKgnguQqV4mzMSm8 u26tvV2/niuyBha8J19vC4aKFE27x9hXg/2HdKDkIhhe3Qj7yaR/TUbEEkiYesZ2r4RC VHxAIMlmtRh1vyXb9cTiopQK1+FOe9HW7tLVMZaWRFN8n3Wbqv1KK9DYVlTfyfSr5rHW WGGlk/ck68kcT7Q2HRvOYtSGIrIie29BLiy709eIwLN0mN8qE9QGxpOqY7s1vWqOCHRA EStd517JWrThOBKNQh0eW6ROiyZZdQwX4f79CDKuupv7S1EfG9h9AP3nZPoEw0io5xEZ Cbug== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@cirrus.com header.s=PODMain02222019 header.b=oPIzpcGV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=cirrus.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ca20-20020a056a02069400b00565307ee53bsi285425pgb.439.2023.08.08.13.31.40; Tue, 08 Aug 2023 13:31:53 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@cirrus.com header.s=PODMain02222019 header.b=oPIzpcGV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=cirrus.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235426AbjHHTpH (ORCPT + 99 others); Tue, 8 Aug 2023 15:45:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235315AbjHHToq (ORCPT ); Tue, 8 Aug 2023 15:44:46 -0400 Received: from mx0b-001ae601.pphosted.com (mx0b-001ae601.pphosted.com [67.231.152.168]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 65A8F117A02 for ; Tue, 8 Aug 2023 09:48:07 -0700 (PDT) Received: from pps.filterd (m0077474.ppops.net [127.0.0.1]) by mx0b-001ae601.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 378GfYwE012826; Tue, 8 Aug 2023 11:47:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= PODMain02222019; bh=Mt28dTgZ7PN6kO/FpAGHcn+lAjxM4yoMpXnoYmoEICM=; b= oPIzpcGViEhf22/FDG+vD+CfVPnzGYPiXgctTKouarGtNDf6G2s3sLxE5s72H2Ef bpm1w1jZOwk5mLqZgXOePSh/DcFG4n+TsefJhSugbBEuvVsX7ZaFlmV4Vk7jCWT7 4bI+6Ki1oGnbl7ZPY5sK2DwgFJvnviWgJMB4x2cyxBdtmhZ/q7CyPSYW87ZA5XoA f92toe1BTCFqlixXNH8M9SIDZou9IOMteAIk4SPW9Nc6a4j0DPHS/e1oliqS0gwE drYNJZdfgTEsYT7FbFhyqoxp5vCOiyxbK6PPTW3CPd1mVD1+iacz1HAbh6Q09T/k CB/WncpoeOiz/AgOz9LiOQ== Received: from ediex01.ad.cirrus.com ([84.19.233.68]) by mx0b-001ae601.pphosted.com (PPS) with ESMTPS id 3s9juhtucr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 08 Aug 2023 11:47:06 -0500 (CDT) Received: from ediex02.ad.cirrus.com (198.61.84.81) by ediex01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Tue, 8 Aug 2023 17:47:04 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by anon-ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server id 15.2.1118.30 via Frontend Transport; Tue, 8 Aug 2023 17:47:04 +0100 Received: from EDIN4L06LR3.ad.cirrus.com (EDIN4L06LR3.ad.cirrus.com [198.61.64.220]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id A41F515B7; Tue, 8 Aug 2023 16:47:04 +0000 (UTC) From: Richard Fitzgerald To: CC: , , , Richard Fitzgerald Subject: [PATCH 1/5] ASoC: cs35l56: Avoid uninitialized variable in cs35l56_set_asp_slot_positions() Date: Tue, 8 Aug 2023 17:46:58 +0100 Message-ID: <20230808164702.21272-2-rf@opensource.cirrus.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230808164702.21272-1-rf@opensource.cirrus.com> References: <20230808164702.21272-1-rf@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: 5TEVI71sAI4bd-azc_I1dsY-qWuAlvMR X-Proofpoint-ORIG-GUID: 5TEVI71sAI4bd-azc_I1dsY-qWuAlvMR X-Proofpoint-Spam-Reason: safe X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773694315776426764 X-GMAIL-MSGID: 1773694315776426764 Re-implement setting of ASP TDM slots so that only the common loop to build the register word is factored out. The original cs35l56_set_asp_slot_positions() had an apparent uninitialized variable if the passed register address was neither of the ASP slot registers. In fact this would never happen because the calling code passed valid registers. While it's trivial to initialize the variable or add a default case, actually the only common code was the loop at the end of the function, which simply manipulates some mask values and is identical for either register. Factoring out the regmap_write() didn't really gain anything. So instead re-implement the code to replace the original function with cs35l56_make_tdm_config_word() that only does the loop, and change the calling code to call regmap_write() directly. Signed-off-by: Richard Fitzgerald --- sound/soc/codecs/cs35l56.c | 24 ++++++++---------------- 1 file changed, 8 insertions(+), 16 deletions(-) diff --git a/sound/soc/codecs/cs35l56.c b/sound/soc/codecs/cs35l56.c index 19b6b4fbe5de..be400208205a 100644 --- a/sound/soc/codecs/cs35l56.c +++ b/sound/soc/codecs/cs35l56.c @@ -358,22 +358,11 @@ static int cs35l56_asp_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int f return 0; } -static void cs35l56_set_asp_slot_positions(struct cs35l56_private *cs35l56, - unsigned int reg, unsigned long mask) +static unsigned int cs35l56_make_tdm_config_word(unsigned int reg_val, unsigned long mask) { - unsigned int reg_val, channel_shift; + unsigned int channel_shift; int bit_num; - /* Init all slots to 63 */ - switch (reg) { - case CS35L56_ASP1_FRAME_CONTROL1: - reg_val = 0x3f3f3f3f; - break; - case CS35L56_ASP1_FRAME_CONTROL5: - reg_val = 0x3f3f3f; - break; - } - /* Enable consecutive TX1..TXn for each of the slots set in mask */ channel_shift = 0; for_each_set_bit(bit_num, &mask, 32) { @@ -382,7 +371,7 @@ static void cs35l56_set_asp_slot_positions(struct cs35l56_private *cs35l56, channel_shift += 8; } - regmap_write(cs35l56->base.regmap, reg, reg_val); + return reg_val; } static int cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, @@ -418,8 +407,11 @@ static int cs35l56_asp_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx if (rx_mask == 0) rx_mask = 0xf; // ASPTX1..TX4 in slots 0..3 - cs35l56_set_asp_slot_positions(cs35l56, CS35L56_ASP1_FRAME_CONTROL1, rx_mask); - cs35l56_set_asp_slot_positions(cs35l56, CS35L56_ASP1_FRAME_CONTROL5, tx_mask); + /* Default unused slots to 63 */ + regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL1, + cs35l56_make_tdm_config_word(0x3f3f3f3f, rx_mask)); + regmap_write(cs35l56->base.regmap, CS35L56_ASP1_FRAME_CONTROL5, + cs35l56_make_tdm_config_word(0x3f3f3f, tx_mask)); dev_dbg(cs35l56->base.dev, "tdm slot width: %u count: %u tx_mask: %#x rx_mask: %#x\n", cs35l56->asp_slot_width, cs35l56->asp_slot_count, tx_mask, rx_mask);