[1/2] riscv: dts: starfive - Add crypto and DMA node for JH7110

Message ID 20230808061150.81491-2-jiajie.ho@starfivetech.com
State New
Headers
Series riscv: dts: starfive - Add crypto and trng node |

Commit Message

JiaJie Ho Aug. 8, 2023, 6:11 a.m. UTC
  Add hardware crypto module and dedicated dma controller node to StarFive
JH7110 SoC.

Co-developed-by: Huan Feng <huan.feng@starfivetech.com>
Signed-off-by: Huan Feng <huan.feng@starfivetech.com>
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
---
 arch/riscv/boot/dts/starfive/jh7110.dtsi | 28 ++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
  

Comments

Conor Dooley Aug. 8, 2023, 7:16 a.m. UTC | #1
On Tue, Aug 08, 2023 at 02:11:49PM +0800, Jia Jie Ho wrote:
> Add hardware crypto module and dedicated dma controller node to StarFive
> JH7110 SoC.
> 
> Co-developed-by: Huan Feng <huan.feng@starfivetech.com>
> Signed-off-by: Huan Feng <huan.feng@starfivetech.com>
> Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
> Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
> ---
>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 28 ++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index a608433200e8..47cd12ccc988 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -821,6 +821,34 @@ watchdog@13070000 {
>  				 <&syscrg JH7110_SYSRST_WDT_CORE>;
>  		};
>  
> +		crypto: crypto@16000000 {
> +			compatible = "starfive,jh7110-crypto";
> +			reg = <0x0 0x16000000 0x0 0x4000>;
> +			clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>,
> +				 <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>;
> +			clock-names = "hclk", "ahb";
> +			interrupts = <28>;
> +			resets = <&stgcrg JH7110_STGRST_SEC_AHB>;
> +			dmas = <&sdma 1 2>, <&sdma 0 2>;
> +			dma-names = "tx", "rx";
> +		};
> +
> +		sdma: dma@16008000 {
> +			compatible = "arm,pl080", "arm,primecell";
> +			arm,primecell-periphid = <0x00041080>;
> +			reg = <0x0 0x16008000 0x0 0x4000>;
> +			interrupts = <29>;
> +			clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>,
> +				 <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>;
> +			clock-names = "hclk", "apb_pclk";
> +			resets = <&stgcrg JH7110_STGRST_SEC_AHB>;
> +			lli-bus-interface-ahb1;
> +			mem-bus-interface-ahb1;
> +			memcpy-burst-size = <256>;
> +			memcpy-bus-width = <32>;
> +			#dma-cells = <2>;
> +		};
> +

Against linux-next, I get these warnings:
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: $nodename:0: 'dma@16008000' does not match '^dma-controller(@.*)?$'
        from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: clocks: [[26, 15], [26, 16]] is too long
        from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: clock-names: ['hclk', 'apb_pclk'] is too long
        from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: Unevaluated properties are not allowed ('#dma-cells' was unexpected)
        from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: $nodename:0: 'dma@16008000' does not match '^dma-controller(@.*)?$'
        from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: clocks: [[26, 15], [26, 16]] is too long
        from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: clock-names: ['hclk', 'apb_pclk'] is too long
        from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: Unevaluated properties are not allowed ('#dma-cells' was unexpected)
        from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#

Please fix these & submit a tested v2.

Thanks,
Conor.
  
JiaJie Ho Aug. 8, 2023, 7:38 a.m. UTC | #2
On 8/8/2023 3:16 pm, Conor Dooley wrote:
> On Tue, Aug 08, 2023 at 02:11:49PM +0800, Jia Jie Ho wrote:
>> Add hardware crypto module and dedicated dma controller node to StarFive
>> JH7110 SoC.
>> 
>> Co-developed-by: Huan Feng <huan.feng@starfivetech.com>
>> Signed-off-by: Huan Feng <huan.feng@starfivetech.com>
>> Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
>> Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
>> ---
>>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 28 ++++++++++++++++++++++++
>>  1 file changed, 28 insertions(+)
>> 
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> index a608433200e8..47cd12ccc988 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> @@ -821,6 +821,34 @@ watchdog@13070000 {
>>  				 <&syscrg JH7110_SYSRST_WDT_CORE>;
>>  		};
>>  
>> +		crypto: crypto@16000000 {
>> +			compatible = "starfive,jh7110-crypto";
>> +			reg = <0x0 0x16000000 0x0 0x4000>;
>> +			clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>,
>> +				 <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>;
>> +			clock-names = "hclk", "ahb";
>> +			interrupts = <28>;
>> +			resets = <&stgcrg JH7110_STGRST_SEC_AHB>;
>> +			dmas = <&sdma 1 2>, <&sdma 0 2>;
>> +			dma-names = "tx", "rx";
>> +		};
>> +
>> +		sdma: dma@16008000 {
>> +			compatible = "arm,pl080", "arm,primecell";
>> +			arm,primecell-periphid = <0x00041080>;
>> +			reg = <0x0 0x16008000 0x0 0x4000>;
>> +			interrupts = <29>;
>> +			clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>,
>> +				 <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>;
>> +			clock-names = "hclk", "apb_pclk";
>> +			resets = <&stgcrg JH7110_STGRST_SEC_AHB>;
>> +			lli-bus-interface-ahb1;
>> +			mem-bus-interface-ahb1;
>> +			memcpy-burst-size = <256>;
>> +			memcpy-bus-width = <32>;
>> +			#dma-cells = <2>;
>> +		};
>> +
> 
> Against linux-next, I get these warnings:
> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: $nodename:0: 'dma@16008000' does not match '^dma-controller(@.*)?$'
>         from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: clocks: [[26, 15], [26, 16]] is too long
>         from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: clock-names: ['hclk', 'apb_pclk'] is too long
>         from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dtb: dma@16008000: Unevaluated properties are not allowed ('#dma-cells' was unexpected)
>         from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: $nodename:0: 'dma@16008000' does not match '^dma-controller(@.*)?$'
>         from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: clocks: [[26, 15], [26, 16]] is too long
>         from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: clock-names: ['hclk', 'apb_pclk'] is too long
>         from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
> arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dtb: dma@16008000: Unevaluated properties are not allowed ('#dma-cells' was unexpected)
>         from schema $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
> 
> Please fix these & submit a tested v2.
> 

Sorry, I missed testing the dma node.
Will fix this in next version.

Regards,
Jia Jie
  

Patch

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index a608433200e8..47cd12ccc988 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -821,6 +821,34 @@  watchdog@13070000 {
 				 <&syscrg JH7110_SYSRST_WDT_CORE>;
 		};
 
+		crypto: crypto@16000000 {
+			compatible = "starfive,jh7110-crypto";
+			reg = <0x0 0x16000000 0x0 0x4000>;
+			clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>,
+				 <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>;
+			clock-names = "hclk", "ahb";
+			interrupts = <28>;
+			resets = <&stgcrg JH7110_STGRST_SEC_AHB>;
+			dmas = <&sdma 1 2>, <&sdma 0 2>;
+			dma-names = "tx", "rx";
+		};
+
+		sdma: dma@16008000 {
+			compatible = "arm,pl080", "arm,primecell";
+			arm,primecell-periphid = <0x00041080>;
+			reg = <0x0 0x16008000 0x0 0x4000>;
+			interrupts = <29>;
+			clocks = <&stgcrg JH7110_STGCLK_SEC_AHB>,
+				 <&stgcrg JH7110_STGCLK_SEC_MISC_AHB>;
+			clock-names = "hclk", "apb_pclk";
+			resets = <&stgcrg JH7110_STGRST_SEC_AHB>;
+			lli-bus-interface-ahb1;
+			mem-bus-interface-ahb1;
+			memcpy-burst-size = <256>;
+			memcpy-bus-width = <32>;
+			#dma-cells = <2>;
+		};
+
 		gmac0: ethernet@16030000 {
 			compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
 			reg = <0x0 0x16030000 0x0 0x10000>;