From patchwork Tue Aug 8 04:45:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hari Nagalla X-Patchwork-Id: 132819 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:c44e:0:b0:3f2:4152:657d with SMTP id w14csp2364821vqr; Tue, 8 Aug 2023 13:03:37 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFIWVWpkZ9pS+rycka4gAd97ndk3lcGdWfrpWPctI4q1m9vaKKq1J1eWWeb2KQ37Z/j4Wnf X-Received: by 2002:a17:902:778c:b0:1bb:a6db:3fd0 with SMTP id o12-20020a170902778c00b001bba6db3fd0mr684726pll.69.1691525017536; Tue, 08 Aug 2023 13:03:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691525017; cv=none; d=google.com; s=arc-20160816; b=hWjXMGJRZWlQ5wZj62haHh6eEKu9kdNCQVyIyIR6Q4M9vSBptQKROVpCMYiQ9OxNhu /5cR563kZ6pjEv/gwuz3RAhJfFC+hLey64rtP60VdmCuuH9uujh/plIvJ5KuYUQjpslF 5mrfw9rTrKF/+bABVvMqAhXwslkhfsfPAnVfH0PFEW4pmTmd687mGb009DR5Cpmbg1Iv pmG0ddbuirKE29QFzD8IM+TFDZoCAUecpEy4K+nMcDNF3Gp8AfG+dsNU3RQ0kJE1Eghq O1ItSZk3EFsKEpULBEOBEZ67j/T43eKzeEkm6o8KqApXA34TF6BbnHff8SaCqPIZCRvq TxMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=Yjzy1f4Yo+2tE1Bz1o6r2anCMRPv55nXaymz1EfrMOE=; fh=nRWqd2TuJEToaeDtwXX1WSffarGhTfUlSdLYacAxjOE=; b=XYN6Ic+QM47q93v6KD2jH2J8hmmWidpmPXuxy/E/Ec7lcqu66J4zGQ0Z6IakUBX1h9 nyiA0wRRr+NBjZ5mvACyD+lddrxOLUexLEmI61fQZ+pmFUVYzsrNjarRzGhQmK9+XXTE 3lS9sSnKL8H3+rGWCZfBOJhIEXzSO+i/o9AEAuyhaPomGuSub9IuF1e7xEfHlbMB2rl6 zBKm2v3N7b072B0aFH/OhSrMGJwdYoF/JXHsgbzOP4QVFjcdbk1zUGNiPHaK8JS8JtMt mO52cvQ++3jt5g60gg7dwBMthPMXRzAUkTNzFqMnqIZfDZmcFym8CjjnSMrZA9ujhyDa Vu9Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Of+H05UU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id f13-20020a170902684d00b001b9e21bc14dsi7546370pln.652.2023.08.08.13.03.20; Tue, 08 Aug 2023 13:03:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Of+H05UU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234687AbjHHTcl (ORCPT + 99 others); Tue, 8 Aug 2023 15:32:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53030 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233375AbjHHTcY (ORCPT ); Tue, 8 Aug 2023 15:32:24 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 30D549016; Tue, 8 Aug 2023 12:05:04 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 3784jZWI099081; Mon, 7 Aug 2023 23:45:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691469935; bh=Yjzy1f4Yo+2tE1Bz1o6r2anCMRPv55nXaymz1EfrMOE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Of+H05UUMjW2bzglpzZSb4M5B9YJc7YGYDoOoY+jpl7DnUHRqAnPOR3iAKNFWauuT xs+BGCJUrc+95ayq6YxTmq1uvistaoE4DjYZ/tjJIJUbCijFZdGqIrSz9xD+uJQ0vQ SOGCJ3dbfFsUewaMFpz6fLXOpv0dX2KGKX+3Dxr4= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 3784jZrG009809 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 7 Aug 2023 23:45:35 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 7 Aug 2023 23:45:35 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 7 Aug 2023 23:45:35 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 3784jZBc114394; Mon, 7 Aug 2023 23:45:35 -0500 From: Hari Nagalla To: , , , , , , , , , CC: , , , Subject: [PATCH v5 3/5] arm64: dts: ti: k3-am64 : Add M4F remote proc node Date: Mon, 7 Aug 2023 23:45:27 -0500 Message-ID: <20230808044529.25925-4-hnagalla@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230808044529.25925-1-hnagalla@ti.com> References: <20230808044529.25925-1-hnagalla@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773692536835580752 X-GMAIL-MSGID: 1773692536835580752 The AM64x SoCs of the TI K3 family have a Cortex M4F core in the MCU domain. This core can be used by non safety applications as a remote processor. When used as a remote processor with virtio/rpmessage IPC, two carveout reserved memory nodes are needed. The first region is used as a DMA pool for the rproc device, and the second region will furnish the static carveout regions for the firmware memory. The current carveout addresses and sizes are defined statically for each rproc device. The M4F processor do not have an MMU, and as such require the exact memory used by the firmware to be set-aside. Signed-off-by: Hari Nagalla --- Changes in v5: - Add M4F device node patches to the patch list arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/ti/k3-am642-evm.dts | 18 ++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am642-sk.dts | 18 ++++++++++++++++++ 3 files changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi index 686d49790721..4151d0057bc8 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi @@ -158,4 +158,16 @@ mcu_esm: esm@4100000 { reg = <0x00 0x4100000 0x00 0x1000>; ti,esm-pins = <0>, <1>; }; + + mcu_m4fss: m4fss@5000000 { + compatible = "ti,am64-m4fss"; + reg = <0x00 0x5000000 0x00 0x30000>, + <0x00 0x5040000 0x00 0x10000>; + reg-names = "iram", "dram"; + ti,sci = <&dmsc>; + ti,sci-dev-id = <9>; + ti,sci-proc-ids = <0x18 0xff>; + resets = <&k3_reset 9 1>; + firmware-name = "am64-mcu-m4f0_0-fw"; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index d84e7ee16032..4fd1dc162534 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -99,6 +99,18 @@ main_r5fss1_core1_memory_region: r5f-memory@a3100000 { no-map; }; + mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa4000000 0x00 0x100000>; + no-map; + }; + + mcu_m4fss_memory_region: m4f-memory@a4100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa4100000 0x00 0xf00000>; + no-map; + }; + rtos_ipc_memory_region: ipc-memories@a5000000 { reg = <0x00 0xa5000000 0x00 0x00800000>; alignment = <0x1000>; @@ -639,6 +651,12 @@ &main_r5fss1_core1 { <&main_r5fss1_core1_memory_region>; }; +&mcu_m4fss { + mboxes = <&mailbox0_cluster6>, <&mbox_m4_0>; + memory-region = <&mcu_m4fss_dma_memory_region>, + <&mcu_m4fss_memory_region>; +}; + &serdes_ln_ctrl { idle-states = ; }; diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 963d796a3a97..f919dd5ba9ba 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -98,6 +98,18 @@ main_r5fss1_core1_memory_region: r5f-memory@a3100000 { no-map; }; + mcu_m4fss_dma_memory_region: m4f-dma-memory@a4000000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa4000000 0x00 0x100000>; + no-map; + }; + + mcu_m4fss_memory_region: m4f-memory@a4100000 { + compatible = "shared-dma-pool"; + reg = <0x00 0xa4100000 0x00 0xf00000>; + no-map; + }; + rtos_ipc_memory_region: ipc-memories@a5000000 { reg = <0x00 0xa5000000 0x00 0x00800000>; alignment = <0x1000>; @@ -637,6 +649,12 @@ &main_r5fss1_core1 { <&main_r5fss1_core1_memory_region>; }; +&mcu_m4fss { + mboxes = <&mailbox0_cluster6>, <&mbox_m4_0>; + memory-region = <&mcu_m4fss_dma_memory_region>, + <&mcu_m4fss_memory_region>; +}; + &ecap0 { status = "okay"; /* PWM is available on Pin 1 of header J3 */