Message ID | 20230807153307.22174-3-a-bhatia1@ti.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id jo3-20020a17090b140300b00263e423753dsi3904328pjb.42.2023.08.07.09.58.06; Mon, 07 Aug 2023 09:58:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="Us9uDk/7"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230321AbjHGPdv (ORCPT <rfc822;aaronkmseo@gmail.com> + 99 others); Mon, 7 Aug 2023 11:33:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55026 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230333AbjHGPdr (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 7 Aug 2023 11:33:47 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4323D10DE; Mon, 7 Aug 2023 08:33:31 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 377FXCx9058124; Mon, 7 Aug 2023 10:33:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691422392; bh=RJmOQeKql59rBxSYQ7cd3MAn1b1akSFBm9gtQUbZ7NU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Us9uDk/7yGt5ghCEA0mY8zC/eYT4bFrGAXI1PwIUe4xf9EjAHs6yD17fzGQliXpYr z4Fo+KtrzB750FZyLyaaeZ46pAjvIFPpA4aE+BKxOJPvKuAKjuQkZi7wuItUA6Ta/q UFcWJH+B1kMty8BM728eEWpYaRFY2f3fUuN1gPng= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 377FXCkx104663 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 7 Aug 2023 10:33:12 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 7 Aug 2023 10:33:12 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 7 Aug 2023 10:33:12 -0500 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 377FXBuu067289; Mon, 7 Aug 2023 10:33:11 -0500 From: Aradhya Bhatia <a-bhatia1@ti.com> To: Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>, Tero Kristo <kristo@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Catalin Marinas <catalin.marinas@arm.com>, Conor Dooley <conor+dt@kernel.org>, Will Deacon <will@kernel.org>, Francesco Dolcini <francesco@dolcini.it> CC: Devicetree List <devicetree@vger.kernel.org>, Linux Kernel List <linux-kernel@vger.kernel.org>, Linux ARM Kernel List <linux-arm-kernel@lists.infradead.org>, Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>, Rahul T R <r-ravikumar@ti.com>, Devarsh Thakkar <devarsht@ti.com>, Jai Luthra <j-luthra@ti.com>, Jayesh Choudhary <j-choudhary@ti.com>, Aradhya Bhatia <a-bhatia1@ti.com> Subject: [PATCH v4 2/6] arm64: dts: ti: k3-am62-main: Add node for DSS Date: Mon, 7 Aug 2023 21:03:03 +0530 Message-ID: <20230807153307.22174-3-a-bhatia1@ti.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230807153307.22174-1-a-bhatia1@ti.com> References: <20230807153307.22174-1-a-bhatia1@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773590283025448736 X-GMAIL-MSGID: 1773590283025448736 |
Series |
arm64: ti: k3-am62: Add display support
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Commit Message
Aradhya Bhatia
Aug. 7, 2023, 3:33 p.m. UTC
Add Display SubSystem (DSS) DT node for the AM625 SoC.
The DSS supports one each of video pipeline (vid) and video-lite
pipeline (vidl1). It outputs OLDI signals on one video port (VP1) and
DPI signals on another (VP2). The video ports are connected to the
pipelines via 2 identical overlay managers (ovr1 and ovr2).
Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 25 ++++++++++++++++++++++++
1 file changed, 25 insertions(+)
Comments
Hello Aradhya, On 07/08/23 21:03, Aradhya Bhatia wrote: > Add Display SubSystem (DSS) DT node for the AM625 SoC. > > The DSS supports one each of video pipeline (vid) and video-lite > pipeline (vidl1). It outputs OLDI signals on one video port (VP1) and > DPI signals on another (VP2). The video ports are connected to the > pipelines via 2 identical overlay managers (ovr1 and ovr2). > > Signed-off-by: Aradhya Bhatia <a-bhatia1@ti.com> > --- > arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 25 ++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi > index ef90b2bc81eb..6cdca8df1091 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi > @@ -717,6 +717,31 @@ cpts@3d000 { > }; > }; > > + dss: dss@30200000 { > + compatible = "ti,am625-dss"; > + reg = <0x00 0x30200000 0x00 0x1000>, /* common */ > + <0x00 0x30202000 0x00 0x1000>, /* vidl1 */ > + <0x00 0x30206000 0x00 0x1000>, /* vid */ > + <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ > + <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ > + <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */ > + <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */ > + reg-names = "common", "vidl1", "vid", > + "ovr1", "ovr2", "vp1", "vp2"; Indentation is off here. > + power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; > + clocks = <&k3_clks 186 6>, > + <&k3_clks 186 0>, > + <&k3_clks 186 2>; > + clock-names = "fck", "vp1", "vp2"; > + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; > + status = "disabled"; > + > + dss_ports: ports { > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + }; > + > hwspinlock: spinlock@2a000000 { > compatible = "ti,am64-hwspinlock"; > reg = <0x00 0x2a000000 0x00 0x1000>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index ef90b2bc81eb..6cdca8df1091 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -717,6 +717,31 @@ cpts@3d000 { }; }; + dss: dss@30200000 { + compatible = "ti,am625-dss"; + reg = <0x00 0x30200000 0x00 0x1000>, /* common */ + <0x00 0x30202000 0x00 0x1000>, /* vidl1 */ + <0x00 0x30206000 0x00 0x1000>, /* vid */ + <0x00 0x30207000 0x00 0x1000>, /* ovr1 */ + <0x00 0x30208000 0x00 0x1000>, /* ovr2 */ + <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */ + <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */ + reg-names = "common", "vidl1", "vid", + "ovr1", "ovr2", "vp1", "vp2"; + power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 186 6>, + <&k3_clks 186 0>, + <&k3_clks 186 2>; + clock-names = "fck", "vp1", "vp2"; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + + dss_ports: ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + hwspinlock: spinlock@2a000000 { compatible = "ti,am64-hwspinlock"; reg = <0x00 0x2a000000 0x00 0x1000>;