From patchwork Fri Aug 4 10:44:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 131131 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:44a:b0:3f2:4152:657d with SMTP id ez10csp219549vqb; Fri, 4 Aug 2023 05:17:16 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGm37M8Jc5sRIw06GbycnFIYAWZsaoX0/gRemN50K1Jrz4AAUTNoMOrVL+nD2gtE8ehmxmT X-Received: by 2002:aa7:c990:0:b0:521:a99b:a233 with SMTP id c16-20020aa7c990000000b00521a99ba233mr1521727edt.10.1691151435757; Fri, 04 Aug 2023 05:17:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691151435; cv=none; d=google.com; s=arc-20160816; b=qIETnuaXyyzEFROWbFFhnGw2C9nNovpByCnV/FWMPD8JphdbCw33ShfeKIM/4k8PWO kaemsfsinVM5KhOvbwoxl87wMwh1wvKIxeaVAvEPlBLiLa2ojZQ+hyyDKxslaRGH6RZ3 RcA22Y1EM2+PZiXnoIIF1iD5HOCJMwUtBrGcauJ9nu9fzjZG7AkF7vqsWtgzjjANsAD/ YbN46kQ74PXBHueJPctZIrjTGjCcUS0iiPLyuJsNd39hKlaC8cLHwBt4exqGrB0x5W4f OoSv9RjQh/qbPRNIPHAuc66i9BBRXugp8ZBJA5X9P2WttMgFaWqKMZi9HLdO+B2QMRiX seRg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from :dkim-signature; bh=ARkrtq4DPGQqf9pcD00VOwvgSHMggU8tVWbvOV1odwE=; fh=7GYuw25cWCmHG5LrbyQUwFOElFQ4tchxd/wzYEHngW8=; b=0o/vPIY+UhqTpQ7ooi7Hk1jLHIhMjvtsx7LxlofY3r2MHhaDWy5N+KaoDIhwOdWlMz /nQyLhGjEsPVc5Y/7tlfw7oV6Bt5bjem8+ARAfeHuHlKahLs2fWvYh3vemw3qg3CQEiy EnsgnzE0XD5p9frJsYOh2BcMmwvM1bIItWlQSguPVGUGv8RbA/xAcABko+DfQaWrTdEC Jwbo5wNNLxQd3jNNNNrHFAilhSbXu4nxzC1d03vuE9fdXJX3DYTENNsFjTuBqnbze2ho zG41O6K68gaEtYO8jb1JhTAyC21nRwSA4CI5kIxQZ/YzfRfoq7z+DUz8DS7gjAdtAfdE vijQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=QYTeoUI6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id x13-20020aa7dacd000000b0052317adcb31si1559057eds.393.2023.08.04.05.16.51; Fri, 04 Aug 2023 05:17:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=QYTeoUI6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229882AbjHDKpd (ORCPT + 99 others); Fri, 4 Aug 2023 06:45:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231565AbjHDKpB (ORCPT ); Fri, 4 Aug 2023 06:45:01 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1ADEC49EF for ; Fri, 4 Aug 2023 03:44:52 -0700 (PDT) Received: from [127.0.1.1] (91-154-35-171.elisa-laajakaista.fi [91.154.35.171]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id EB3772A4B; Fri, 4 Aug 2023 12:43:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1691145821; bh=ELgigWtoD/WjDlm4NjUr8bRyAjoxE3TF/Vb3awGuK/o=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=QYTeoUI6Z1KP9jf5JNFolFg1oOnCxfAWxOwnaejdsgSk3mgHhAE9UzhfeIem3ckTq mFQDX06n3asaAk/PsPidPV7dL/88XCfsI/8gS2GM4Mc5FW3MnXSoF5/J2crh6Yiapb CxGU1JUmovBYRcEeUU0N2DWGNJBfpRtpliEc7Oc8= From: Tomi Valkeinen Date: Fri, 04 Aug 2023 13:44:13 +0300 Subject: [PATCH 08/11] drm/bridge: tc358768: Clean up clock period code MIME-Version: 1.0 Message-Id: <20230804-tc358768-v1-8-1afd44b7826b@ideasonboard.com> References: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> In-Reply-To: <20230804-tc358768-v1-0-1afd44b7826b@ideasonboard.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , =?utf-8?q?P=C3=A9ter_Ujfalusi?= , Francesco Dolcini Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Aradhya Bhatia , Tomi Valkeinen X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=6503; i=tomi.valkeinen@ideasonboard.com; h=from:subject:message-id; bh=ELgigWtoD/WjDlm4NjUr8bRyAjoxE3TF/Vb3awGuK/o=; b=owEBbQKS/ZANAwAIAfo9qoy8lh71AcsmYgBkzNaTuuWogQSf6kACTFvu2u3h7ud5VB+1iSfB+ k8sp2aRBLyJAjMEAAEIAB0WIQTEOAw+ll79gQef86f6PaqMvJYe9QUCZMzWkwAKCRD6PaqMvJYe 9WLGEACZmidk7hLfu+CoMCAeSUbSFXTWFRD210fCVc+r7o1kzbQJ/IIZP+NmbUiaUkYAvl4l8bh n/Z7K5Hibr/Rq3RXPz2sSxGt3Mh0DpmFgH6DMkUjMUo5EPlVpn3jBuYT4lur0ecSVqjyAYp8DlB glUi5hLQMlFBc2zFaBBhXHeKkCpBG2WqXyzyoLkmvHcBgyY4LckKCgOJVZZMqLWLbobG6Ejgd8Q pwtC0iEZ8g20aBsnueri2dInvpDOSZsEejQX4JyW+YeCiwZN+WlnTnaOy9lIZBijHWabj+zAfOX CKjnR/eveGG6+X0DUVSFCvC9LIkZe27C3Up00ScFfooujkl0bd0fO08UsZ+z0Lp/d9t32Zyw/F4 6FYdILNlhHhBjZEy3DXeX3wgsBv3K82lCGLKvGVPLaQ6sn6fPmyWmBxA4rAl6r3DfSrMOfnCNOx ZzErsEJe0MUnCtQR+DohVWAtRRNZLk9mtauS7LqsXasQamN9SjIrvt/vbOnRnyuqM5QGISLQa51 r3cVq3e3MkXs5+bE6cx3/2SKfNz6abb/YXbldBamUl/Iij8olzW8izYZgpWV2oN/zlV/+Jvjs55 GNbr3qXNBL6SIW6f3DAE6xGZavfBiYYc7efnlCe7UXXo4HTEm3Z1c6yZvNXcw5H8X5HFdJO5sMn u6K+UZWWB+ufaRg== X-Developer-Key: i=tomi.valkeinen@ideasonboard.com; a=openpgp; fpr=C4380C3E965EFD81079FF3A7FA3DAA8CBC961EF5 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_PASS,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773300807601944809 X-GMAIL-MSGID: 1773300807601944809 The driver defines TC358768_PRECISION as 1000, and uses "nsk" to refer to clock periods. The original author does not remember where all this came from. Effectively the driver is using picoseconds as the unit for clock periods, yet referring to them by "nsk". Clean this up by just saying the periods are in picoseconds. Signed-off-by: Tomi Valkeinen Reviewed-by: Peter Ujfalusi --- drivers/gpu/drm/bridge/tc358768.c | 60 +++++++++++++++++++-------------------- 1 file changed, 29 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c index db45b4a982c0..9411b0fb471e 100644 --- a/drivers/gpu/drm/bridge/tc358768.c +++ b/drivers/gpu/drm/bridge/tc358768.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -627,15 +628,14 @@ static int tc358768_setup_pll(struct tc358768_priv *priv, return tc358768_clear_error(priv); } -#define TC358768_PRECISION 1000 -static u32 tc358768_ns_to_cnt(u32 ns, u32 period_nsk) +static u32 tc358768_ns_to_cnt(u32 ns, u32 period_ps) { - return (ns * TC358768_PRECISION + period_nsk) / period_nsk; + return (ns * 1000 + period_ps) / period_ps; } -static u32 tc358768_to_ns(u32 nsk) +static u32 tc358768_ps_to_ns(u32 ps) { - return (nsk / TC358768_PRECISION); + return ps / 1000; } static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) @@ -646,7 +646,7 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) u32 val, val2, lptxcnt, hact, data_type; s32 raw_val; const struct drm_display_mode *mode; - u32 hsbyteclk_nsk, dsiclk_nsk, ui_nsk; + u32 hsbyteclk_ps, dsiclk_ps, ui_ps; u32 dsiclk, hsbyteclk, video_start; const u32 internal_delay = 40; int ret, i; @@ -730,67 +730,65 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) tc358768_write(priv, TC358768_D0W_CNTRL + i * 4, 0x0000); /* DSI Timings */ - hsbyteclk_nsk = (u32)div_u64((u64)1000000000 * TC358768_PRECISION, - hsbyteclk); - dsiclk_nsk = (u32)div_u64((u64)1000000000 * TC358768_PRECISION, dsiclk); - ui_nsk = dsiclk_nsk / 2; - dev_dbg(dev, "dsiclk_nsk: %u\n", dsiclk_nsk); - dev_dbg(dev, "ui_nsk: %u\n", ui_nsk); - dev_dbg(dev, "hsbyteclk_nsk: %u\n", hsbyteclk_nsk); + hsbyteclk_ps = (u32)div_u64(PICO, hsbyteclk); + dsiclk_ps = (u32)div_u64(PICO, dsiclk); + ui_ps = dsiclk_ps / 2; + dev_dbg(dev, "dsiclk: %u ps, ui %u ps, hsbyteclk %u ps\n", dsiclk_ps, + ui_ps, hsbyteclk_ps); /* LP11 > 100us for D-PHY Rx Init */ - val = tc358768_ns_to_cnt(100 * 1000, hsbyteclk_nsk) - 1; + val = tc358768_ns_to_cnt(100 * 1000, hsbyteclk_ps) - 1; dev_dbg(dev, "LINEINITCNT: %u\n", val); tc358768_write(priv, TC358768_LINEINITCNT, val); /* LPTimeCnt > 50ns */ - val = tc358768_ns_to_cnt(50, hsbyteclk_nsk) - 1; + val = tc358768_ns_to_cnt(50, hsbyteclk_ps) - 1; lptxcnt = val; dev_dbg(dev, "LPTXTIMECNT: %u\n", val); tc358768_write(priv, TC358768_LPTXTIMECNT, val); /* 38ns < TCLK_PREPARE < 95ns */ - val = tc358768_ns_to_cnt(65, hsbyteclk_nsk) - 1; + val = tc358768_ns_to_cnt(65, hsbyteclk_ps) - 1; dev_dbg(dev, "TCLK_PREPARECNT %u\n", val); /* TCLK_PREPARE + TCLK_ZERO > 300ns */ - val2 = tc358768_ns_to_cnt(300 - tc358768_to_ns(2 * ui_nsk), - hsbyteclk_nsk) - 2; + val2 = tc358768_ns_to_cnt(300 - tc358768_ps_to_ns(2 * ui_ps), + hsbyteclk_ps) - 2; dev_dbg(dev, "TCLK_ZEROCNT %u\n", val2); val |= val2 << 8; tc358768_write(priv, TC358768_TCLK_HEADERCNT, val); /* TCLK_TRAIL > 60ns AND TEOT <= 105 ns + 12*UI */ - raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(2 * ui_nsk), hsbyteclk_nsk) - 5; + raw_val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(2 * ui_ps), hsbyteclk_ps) - 5; val = clamp(raw_val, 0, 127); dev_dbg(dev, "TCLK_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_TRAILCNT, val); /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */ - val = 50 + tc358768_to_ns(4 * ui_nsk); - val = tc358768_ns_to_cnt(val, hsbyteclk_nsk) - 1; + val = 50 + tc358768_ps_to_ns(4 * ui_ps); + val = tc358768_ns_to_cnt(val, hsbyteclk_ps) - 1; dev_dbg(dev, "THS_PREPARECNT %u\n", val); /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */ - raw_val = tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), hsbyteclk_nsk) - 10; + raw_val = tc358768_ns_to_cnt(145 - tc358768_ps_to_ns(3 * ui_ps), hsbyteclk_ps) - 10; val2 = clamp(raw_val, 0, 127); dev_dbg(dev, "THS_ZEROCNT %u\n", val2); val |= val2 << 8; tc358768_write(priv, TC358768_THS_HEADERCNT, val); /* TWAKEUP > 1ms in lptxcnt steps */ - val = tc358768_ns_to_cnt(1020000, hsbyteclk_nsk); + val = tc358768_ns_to_cnt(1020000, hsbyteclk_ps); val = val / (lptxcnt + 1) - 1; dev_dbg(dev, "TWAKEUP: %u\n", val); tc358768_write(priv, TC358768_TWAKEUP, val); /* TCLK_POSTCNT > 60ns + 52*UI */ - val = tc358768_ns_to_cnt(60 + tc358768_to_ns(52 * ui_nsk), - hsbyteclk_nsk) - 3; + val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(52 * ui_ps), + hsbyteclk_ps) - 3; dev_dbg(dev, "TCLK_POSTCNT: %u\n", val); tc358768_write(priv, TC358768_TCLK_POSTCNT, val); /* max(60ns + 4*UI, 8*UI) < THS_TRAILCNT < 105ns + 12*UI */ - raw_val = tc358768_ns_to_cnt(60 + tc358768_to_ns(18 * ui_nsk), - hsbyteclk_nsk) - 4; + raw_val = tc358768_ns_to_cnt(60 + tc358768_ps_to_ns(18 * ui_ps), + hsbyteclk_ps) - 4; val = clamp(raw_val, 0, 15); dev_dbg(dev, "THS_TRAILCNT: %u\n", val); tc358768_write(priv, TC358768_THS_TRAILCNT, val); @@ -804,11 +802,11 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge) (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? 0 : BIT(0)); /* TXTAGOCNT[26:16] RXTASURECNT[10:0] */ - val = tc358768_to_ns((lptxcnt + 1) * hsbyteclk_nsk * 4); - val = tc358768_ns_to_cnt(val, hsbyteclk_nsk) / 4 - 1; + val = tc358768_ps_to_ns((lptxcnt + 1) * hsbyteclk_ps * 4); + val = tc358768_ns_to_cnt(val, hsbyteclk_ps) / 4 - 1; dev_dbg(dev, "TXTAGOCNT: %u\n", val); - val2 = tc358768_ns_to_cnt(tc358768_to_ns((lptxcnt + 1) * hsbyteclk_nsk), - hsbyteclk_nsk) - 2; + val2 = tc358768_ns_to_cnt(tc358768_ps_to_ns((lptxcnt + 1) * hsbyteclk_ps), + hsbyteclk_ps) - 2; dev_dbg(dev, "RXTASURECNT: %u\n", val2); val = val << 16 | val2; tc358768_write(priv, TC358768_BTACNTRL1, val);