diff mbox series

[PATCHv2] x86/mm: Fix VDSO and VVAR placement on 5-level paging machines

Message ID 20230803151609.22141-1-kirill.shutemov@linux.intel.com
State New
Headers
Series [PATCHv2] x86/mm: Fix VDSO and VVAR placement on 5-level paging machines |

Commit Message

Kirill A. Shutemov Aug. 3, 2023, 3:16 p.m. UTC 
  Yingcong has noticed that on the 5-level paging machine, VDSO and VVAR
VMAs are placed above the 47-bit border:

8000001a9000-8000001ad000 r--p 00000000 00:00 0                          [vvar]
8000001ad000-8000001af000 r-xp 00000000 00:00 0                          [vdso]

This might confuse users who are not aware of 5-level paging and expect
all userspace addresses to be under the 47-bit border.

So far problem has only been triggered with ASLR disabled, although it
may also occur with ASLR enabled if the layout is randomized in a just
right way.

The problem happens due to custom placement for the VMAs in the VDSO
code: vdso_addr() tries to place them above the stack and checks the
result against TASK_SIZE_MAX, which is wrong. TASK_SIZE_MAX is set to
the 56-bit border on 5-level paging machines. Use DEFAULT_MAP_WINDOW
instead.

Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Reported-by: Yingcong Wu <yingcong.wu@intel.com>
Fixes: b569bab78d8d ("x86/mm: Prepare to expose larger address space to userspace")
---
v2:
 - Fix commit message: grammar and passive voice

 arch/x86/entry/vdso/vma.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Edgecombe, Rick P Aug. 5, 2023, 12:13 a.m. UTC | #1 
On Thu, 2023-08-03 at 18:16 +0300, Kirill A. Shutemov wrote:
> Yingcong has noticed that on the 5-level paging machine, VDSO and
> VVAR
> VMAs are placed above the 47-bit border:
> 
> 8000001a9000-8000001ad000 r--p 00000000 00:00
> 0                          [vvar]
> 8000001ad000-8000001af000 r-xp 00000000 00:00
> 0                          [vdso]
> 
> This might confuse users who are not aware of 5-level paging and
> expect
> all userspace addresses to be under the 47-bit border.
> 
> So far problem has only been triggered with ASLR disabled, although
> it
> may also occur with ASLR enabled if the layout is randomized in a
> just
> right way.
> 
> The problem happens due to custom placement for the VMAs in the VDSO
> code: vdso_addr() tries to place them above the stack and checks the
> result against TASK_SIZE_MAX, which is wrong. TASK_SIZE_MAX is set to
> the 56-bit border on 5-level paging machines. Use DEFAULT_MAP_WINDOW
> instead.
> 
> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
> Reported-by: Yingcong Wu <yingcong.wu@intel.com>
> Fixes: b569bab78d8d ("x86/mm: Prepare to expose larger address space
> to userspace")

Reviewed-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
diff mbox series

Patch

diff --git a/arch/x86/entry/vdso/vma.c b/arch/x86/entry/vdso/vma.c
index 11a5c68d1218..7645730dc228 100644
--- a/arch/x86/entry/vdso/vma.c
+++ b/arch/x86/entry/vdso/vma.c
@@ -299,8 +299,8 @@  static unsigned long vdso_addr(unsigned long start, unsigned len)
 
 	/* Round the lowest possible end address up to a PMD boundary. */
 	end = (start + len + PMD_SIZE - 1) & PMD_MASK;
-	if (end >= TASK_SIZE_MAX)
-		end = TASK_SIZE_MAX;
+	if (end >= DEFAULT_MAP_WINDOW)
+		end = DEFAULT_MAP_WINDOW;
 	end -= len;
 
 	if (end > start) {