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Thu, 3 Aug 2023 09:33:03 -0500 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB08.amd.com (10.181.40.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Thu, 3 Aug 2023 07:33:03 -0700 Received: from xhdipdslab41.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Thu, 3 Aug 2023 09:33:00 -0500 From: Nipun Gupta To: , , CC: , , , , , Nipun Gupta , Shubham Rohila Subject: [PATCH v5 2/3] vfio: add bus master feature to device feature ioctl Date: Thu, 3 Aug 2023 20:02:52 +0530 Message-ID: <20230803143253.7817-2-nipun.gupta@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230803143253.7817-1-nipun.gupta@amd.com> References: <20230803143253.7817-1-nipun.gupta@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3F:EE_|BN9PR12MB5113:EE_ X-MS-Office365-Filtering-Correlation-Id: b9727572-906d-4348-91c7-08db942e8d2b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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The VFIO user can use this feature to enable or disable the Bus Mastering of a device bound to VFIO. Co-developed-by: Shubham Rohila Signed-off-by: Shubham Rohila Signed-off-by: Nipun Gupta Changes in v5: - This patch is newly added which proposes a new flag VFIO_DEVICE_FEATURE_BUS_MASTER in VFIO_DEVICE_FEATURE IOCTL. --- include/uapi/linux/vfio.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h index 20c804bdc09c..05350a2f1eab 100644 --- a/include/uapi/linux/vfio.h +++ b/include/uapi/linux/vfio.h @@ -1287,6 +1287,22 @@ struct vfio_device_feature_mig_data_size { #define VFIO_DEVICE_FEATURE_MIG_DATA_SIZE 9 +/** + * Upon VFIO_DEVICE_FEATURE_SET, allow the BUS mastering for the device to be + * set or clear based on the operation specified in op flag. + * + * If the BUS MASTER of the device is configured to CLEAR, + * all the incoming DMA from the device will be blocked. + * If the BUS MASTER of the device is configured to SET (enable), + * device would be able to do DMA to host memory. + */ +struct vfio_device_feature_bus_master { + __u32 op; +#define VFIO_DEVICE_FEATURE_SET_MASTER 0 /* Set Bus Master */ +#define VFIO_DEVICE_FEATURE_CLEAR_MASTER 1 /* Clear Bus Master */ +}; +#define VFIO_DEVICE_FEATURE_BUS_MASTER 9 + /* -------- API for Type1 VFIO IOMMU -------- */ /**