From patchwork Thu Aug 3 11:02:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 130516 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9f41:0:b0:3e4:2afc:c1 with SMTP id v1csp1090128vqx; Thu, 3 Aug 2023 04:50:18 -0700 (PDT) X-Google-Smtp-Source: APBJJlGhA7+KZYZUS4lEypQiYfxfLFJp8POhM/zGDiYZ+Q23ce2QDRhb7Y+M+jE/4/15dSkegJhZ X-Received: by 2002:a05:6a20:3d02:b0:13c:a02a:9804 with SMTP id y2-20020a056a203d0200b0013ca02a9804mr24514420pzi.32.1691063417710; Thu, 03 Aug 2023 04:50:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1691063417; cv=none; d=google.com; s=arc-20160816; b=LVTpLKRSjV9aJ9DDW13imQI85VHIQ6YcvCmcIDJVTARxczHmwOK1ycVXh2N590wtB7 oNqd20z/buBJmA7vR6KBFxo5k543OfABfjaGpLdk/P9ZEj/biNgzdYNAEjz97iJxHLcs P2TAwkSMNJekzpuED+sBLnfkvew7vNSW5O9HwCCJKSewYXEFd08RiO3Bx+gqAD0TWewf lcFE5cQA1Di6pWI9xS4SWcuCjoY+z26CcUHQQYV4o3wOMFjrBsCPf31+CYjD1/asI4Ot rzl+fv8fh392H1pDKHcVLa6EKY+mvYo6/5yCFE31xV2q3SkA3xrEqfA7P9GZ3j802bNs iN3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=obwngE3wNtQILTpmWXSVVqRGgxdeMgYi2Erw2ZajQS0=; fh=wVZEQimxp/UyE4Mf0Sn+nsZcfrBLHvkvU7kacOC/59o=; b=WdW+BXByhz3vWmDtz0uY8MM08KdhKFmTDC1N2qMdHALdWaFcLWHY5W7MPFVqOIrUlo VXSsbEoEiFGcW5UydI1Gk07cfPCJgMbJXApU4b+Eqjspf04BJb/Bqjs2l3IdlG3q8a7p ICNsF4pmJctUnqe4j47UmQIkT3T2sOJCOqgtN+B3xTqFktilbwG13vU4mdUeWeD34loN t5bhYpMahEBBZo0zx1/WrT1Ya29y18FFu5Xo2vgtba+fqT15Hl7v17dbEwcG1nnhoiBZ dn3rmiMckyKa3t6Z/cj0l7pBE7378+b7NPKhpm165x3obWp0cZFdEJXIivT/XpFAokna sYYg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=Po47SfpD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id v10-20020a63f20a000000b005642afbeb3dsi9211899pgh.223.2023.08.03.04.50.03; Thu, 03 Aug 2023 04:50:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=Po47SfpD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235563AbjHCLDk (ORCPT + 99 others); Thu, 3 Aug 2023 07:03:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235459AbjHCLCe (ORCPT ); Thu, 3 Aug 2023 07:02:34 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60DBE3A87 for ; Thu, 3 Aug 2023 04:02:33 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 57EFA66071AD; Thu, 3 Aug 2023 12:02:31 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1691060552; bh=zIuIzaHEwa0qol/Hd+tCNwDoAKXf8h/2l/cB7d8v3GQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Po47SfpDrO8QRYfh0Yp8n/3/DG8uV8OPZDWAW5oGlWFlN/OcQldRt9V5K00nt4rBI FatYBUomIfPRUid+uc0kq4gd06Tu/s0EZl4KtRdO7BuDEUbL8yvqGM4SDRxlMLcFy8 XYzqfLAr24pdGftUSjxvLPJ3afUb4I1TZ34PE3auFfrFrAROZ7BYhy9DQIpc1xPsA9 HSpcyh/fKLfxpSD98o2M9fCHbrU011baabPTI7wnrwxirP9LjkAfdjO6EdLWAv4bjM oZS+ueRN48f8iF6IPmkp8/sCj0qhxDEbJk3gAsSSw32YCh5V2Rjy9Au478njkV/Tn7 9Fgnz3RmIVHyg== From: AngeloGioacchino Del Regno To: chunkuang.hu@kernel.org Cc: p.zabel@pengutronix.de, airlied@gmail.com, daniel@ffwll.ch, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, wenst@chromium.org, kernel@collabora.com, ehristev@collabora.com, "Jason-JH . Lin" , Alexandre Mergnat Subject: [PATCH v9 12/16] drm/mediatek: gamma: Make sure relay mode is disabled Date: Thu, 3 Aug 2023 13:02:10 +0200 Message-ID: <20230803110214.163645-13-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230803110214.163645-1-angelogioacchino.delregno@collabora.com> References: <20230803110214.163645-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773208514152557690 X-GMAIL-MSGID: 1773208514152557690 Disable relay mode at the end of LUT programming to make sure that the processed image goes through in both DISP_GAMMA and DISP_AAL for gamma setting. Signed-off-by: AngeloGioacchino Del Regno Reviewed-by: Jason-JH.Lin Reviewed-by: Alexandre Mergnat --- drivers/gpu/drm/mediatek/mtk_disp_aal.c | 3 +++ drivers/gpu/drm/mediatek/mtk_disp_gamma.c | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_aal.c b/drivers/gpu/drm/mediatek/mtk_disp_aal.c index 21b25470e9b7..992dc1424c91 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_aal.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_aal.c @@ -122,6 +122,9 @@ void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state) writel(word, (aal->regs + DISP_AAL_GAMMA_LUT) + (i * 4)); } + /* Disable RELAY mode to pass the processed image */ + cfg_val &= ~AAL_RELAY_MODE; + writel(cfg_val, aal->regs + DISP_AAL_CFG); } diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c index 7d2f8042ace0..fbff9f97b737 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c @@ -19,6 +19,7 @@ #define DISP_GAMMA_EN 0x0000 #define GAMMA_EN BIT(0) #define DISP_GAMMA_CFG 0x0020 +#define GAMMA_RELAY_MODE BIT(0) #define GAMMA_LUT_EN BIT(1) #define GAMMA_DITHERING BIT(2) #define DISP_GAMMA_SIZE 0x0030 @@ -177,6 +178,9 @@ void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state) /* Enable the gamma table */ cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1); + /* Disable RELAY mode to pass the processed image */ + cfg_val &= ~GAMMA_RELAY_MODE; + writel(cfg_val, gamma->regs + DISP_GAMMA_CFG); }