@@ -324,6 +324,20 @@ static const struct linear_range vldo28_ranges[] = {
REGULATOR_LINEAR_RANGE(3000000, 11, 21, 10000),
};
+static const unsigned int mt6366_vmddr_selectors[] = { 0, 1, 2, 3, 4, 5, 6, 7, 9, 12 };
+static const struct linear_range mt6366_vmddr_ranges[] = {
+ REGULATOR_LINEAR_RANGE(600000, 0, 10, 10000),
+ REGULATOR_LINEAR_RANGE(700000, 11, 21, 10000),
+ REGULATOR_LINEAR_RANGE(800000, 22, 32, 10000),
+ REGULATOR_LINEAR_RANGE(900000, 33, 43, 10000),
+ REGULATOR_LINEAR_RANGE(1000000, 44, 54, 10000),
+ REGULATOR_LINEAR_RANGE(1100000, 55, 65, 10000),
+ REGULATOR_LINEAR_RANGE(1200000, 66, 76, 10000),
+ REGULATOR_LINEAR_RANGE(1300000, 77, 87, 10000),
+ REGULATOR_LINEAR_RANGE(1500000, 88, 98, 10000),
+ REGULATOR_LINEAR_RANGE(1800000, 99, 109, 10000),
+};
+
static const unsigned int mt6366_vcn18_vm18_selectors[] = {
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
static const struct linear_range mt6366_vcn18_vm18_ranges[] = {
@@ -613,6 +627,10 @@ static const struct mt6358_regulator_info mt6366_regulators[] = {
MT6358_LDO_VSIM2_CON0, 0, MT6358_VSIM2_ANA_CON0, 0xf00),
MT6366_LDO("vcn18", VCN18, mt6366_vcn18_vm18,
MT6358_LDO_VCN18_CON0, 0, MT6358_VCN18_ANA_CON0, 0xf00),
+ MT6366_LDO("vm18", VM18, mt6366_vcn18_vm18,
+ MT6358_LDO_VM18_CON0, 0, MT6358_VM18_ANA_CON0, 0xf00),
+ MT6366_LDO("vmddr", VMDDR, mt6366_vmddr,
+ MT6358_LDO_VMDDR_CON0, 0, MT6358_VMDDR_ANA_CON0, 0xf00),
MT6366_LDO1("vsram-proc11", VSRAM_PROC11, 500000, 1293750, 6250,
MT6358_LDO_VSRAM_PROC11_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON0, 0x7f),
MT6366_LDO1("vsram-others", VSRAM_OTHERS, 500000, 1293750, 6250,
@@ -621,6 +639,8 @@ static const struct mt6358_regulator_info mt6366_regulators[] = {
MT6358_LDO_VSRAM_GPU_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON3, 0x7f),
MT6366_LDO1("vsram-proc12", VSRAM_PROC12, 500000, 1293750, 6250,
MT6358_LDO_VSRAM_PROC12_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON1, 0x7f),
+ MT6366_LDO1("vsram-core", VSRAM_CORE, 500000, 1293750, 6250,
+ MT6358_LDO_VSRAM_CORE_DBG0, 0x7f00, MT6358_LDO_VSRAM_CON5, 0x7f),
};
static int mt6358_sync_vcn33_setting(struct device *dev)
@@ -86,6 +86,9 @@ enum {
MT6366_ID_VMC,
MT6366_ID_VAUD28,
MT6366_ID_VSIM2,
+ MT6366_ID_VM18,
+ MT6366_ID_VMDDR,
+ MT6366_ID_VSRAM_CORE,
MT6366_ID_RG_MAX,
};