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[v18,20/30] LoongArch: KVM: Implement handle csr excption

Message ID	20230803022138.2736430-21-zhaotianrui@loongson.cn
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; From: Tianrui Zhao <zhaotianrui@loongson.cn> To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: Paolo Bonzini <pbonzini@redhat.com>, Huacai Chen <chenhuacai@kernel.org>, WANG Xuerui <kernel@xen0n.name>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, loongarch@lists.linux.dev, Jens Axboe <axboe@kernel.dk>, Mark Brown <broonie@kernel.org>, Alex Deucher <alexander.deucher@amd.com>, Oliver Upton <oliver.upton@linux.dev>, maobibo@loongson.cn, Xi Ruoyao <xry111@xry111.site>, zhaotianrui@loongson.cn Subject: [PATCH v18 20/30] LoongArch: KVM: Implement handle csr excption Date: Thu, 3 Aug 2023 10:21:28 +0800 Message-Id: <20230803022138.2736430-21-zhaotianrui@loongson.cn> In-Reply-To: <20230803022138.2736430-1-zhaotianrui@loongson.cn> References: <20230803022138.2736430-1-zhaotianrui@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Add KVM LoongArch support \| [v18,00/30] Add KVM LoongArch support [v18,01/30] LoongArch: KVM: Add kvm related header files [v18,02/30] LoongArch: KVM: Implement kvm module related interface [v18,03/30] LoongArch: KVM: Implement kvm hardware enable, disable interface [v18,04/30] LoongArch: KVM: Implement VM related functions [v18,05/30] LoongArch: KVM: Add vcpu related header files [v18,06/30] LoongArch: KVM: Implement vcpu create and destroy interface [v18,07/30] LoongArch: KVM: Implement vcpu run interface [v18,08/30] LoongArch: KVM: Implement vcpu handle exit interface [v18,09/30] LoongArch: KVM: Implement vcpu get, vcpu set registers [v18,10/30] LoongArch: KVM: Implement vcpu ENABLE_CAP ioctl interface [v18,11/30] LoongArch: KVM: Implement fpu related operations for vcpu [v18,12/30] LoongArch: KVM: Implement vcpu interrupt operations [v18,13/30] LoongArch: KVM: Implement misc vcpu related interfaces [v18,14/30] LoongArch: KVM: Implement vcpu load and vcpu put operations [v18,15/30] LoongArch: KVM: Implement vcpu status description [v18,16/30] LoongArch: KVM: Implement update VM id function [v18,17/30] LoongArch: KVM: Implement virtual machine tlb operations [v18,18/30] LoongArch: KVM: Implement vcpu timer operations [v18,19/30] LoongArch: KVM: Implement kvm mmu operations [v18,20/30] LoongArch: KVM: Implement handle csr excption [v18,21/30] LoongArch: KVM: Implement handle iocsr exception [v18,22/30] LoongArch: KVM: Implement handle idle exception [v18,23/30] LoongArch: KVM: Implement handle gspr exception [v18,24/30] LoongArch: KVM: Implement handle mmio exception [v18,25/30] LoongArch: KVM: Implement handle fpu exception [v18,26/30] LoongArch: KVM: Implement kvm exception vector [v18,27/30] LoongArch: KVM: Implement vcpu world switch [v18,28/30] LoongArch: KVM: Enable kvm config and add the makefile [v18,29/30] LoongArch: KVM: Supplement kvm document about LoongArch-specific part [v18,30/30] LoongArch: KVM: Add maintainers for LoongArch KVM

Commit Message

zhaotianrui Aug. 3, 2023, 2:21 a.m. UTC

  Implement kvm handle LoongArch vcpu exit caused by reading and
writing csr. Using csr structure to emulate the registers.

Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn>
---
 arch/loongarch/kvm/exit.c | 98 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 98 insertions(+)
 create mode 100644 arch/loongarch/kvm/exit.c

diff mbox series

Patch

diff --git a/arch/loongarch/kvm/exit.c b/arch/loongarch/kvm/exit.c
new file mode 100644
index 000000000000..18635333fc9a
--- /dev/null
+++ b/arch/loongarch/kvm/exit.c
@@ -0,0 +1,98 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020-2023 Loongson Technology Corporation Limited
+ */
+
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/module.h>
+#include <linux/preempt.h>
+#include <linux/vmalloc.h>
+#include <asm/fpu.h>
+#include <asm/inst.h>
+#include <asm/time.h>
+#include <asm/tlb.h>
+#include <asm/loongarch.h>
+#include <asm/numa.h>
+#include <asm/kvm_vcpu.h>
+#include <asm/kvm_csr.h>
+#include <linux/kvm_host.h>
+#include <asm/mmzone.h>
+#include "trace.h"
+
+static unsigned long _kvm_emu_read_csr(struct kvm_vcpu *vcpu, int csrid)
+{
+	struct loongarch_csrs *csr = vcpu->arch.csr;
+	unsigned long val = 0;
+
+	if (get_gcsr_flag(csrid) & SW_GCSR)
+		val = kvm_read_sw_gcsr(csr, csrid);
+	else
+		pr_warn_once("Unsupport csrread 0x%x with pc %lx\n",
+			csrid, vcpu->arch.pc);
+	return val;
+}
+
+static void _kvm_emu_write_csr(struct kvm_vcpu *vcpu, int csrid,
+	unsigned long val)
+{
+	struct loongarch_csrs *csr = vcpu->arch.csr;
+
+	if (get_gcsr_flag(csrid) & SW_GCSR)
+		kvm_write_sw_gcsr(csr, csrid, val);
+	else
+		pr_warn_once("Unsupport csrwrite 0x%x with pc %lx\n",
+				csrid, vcpu->arch.pc);
+}
+
+static void _kvm_emu_xchg_csr(struct kvm_vcpu *vcpu, int csrid,
+	unsigned long csr_mask, unsigned long val)
+{
+	struct loongarch_csrs *csr = vcpu->arch.csr;
+
+	if (get_gcsr_flag(csrid) & SW_GCSR) {
+		unsigned long orig;
+
+		orig = kvm_read_sw_gcsr(csr, csrid);
+		orig &= ~csr_mask;
+		orig |= val & csr_mask;
+		kvm_write_sw_gcsr(csr, csrid, orig);
+	} else
+		pr_warn_once("Unsupport csrxchg 0x%x with pc %lx\n",
+				csrid, vcpu->arch.pc);
+}
+
+static int _kvm_handle_csr(struct kvm_vcpu *vcpu, larch_inst inst)
+{
+	unsigned int rd, rj, csrid;
+	unsigned long csr_mask;
+	unsigned long val = 0;
+
+	/*
+	 * CSR value mask imm
+	 * rj = 0 means csrrd
+	 * rj = 1 means csrwr
+	 * rj != 0,1 means csrxchg
+	 */
+	rd = inst.reg2csr_format.rd;
+	rj = inst.reg2csr_format.rj;
+	csrid = inst.reg2csr_format.csr;
+
+	/* Process CSR ops */
+	if (rj == 0) {
+		/* process csrrd */
+		val = _kvm_emu_read_csr(vcpu, csrid);
+		vcpu->arch.gprs[rd] = val;
+	} else if (rj == 1) {
+		/* process csrwr */
+		val = vcpu->arch.gprs[rd];
+		_kvm_emu_write_csr(vcpu, csrid, val);
+	} else {
+		/* process csrxchg */
+		val = vcpu->arch.gprs[rd];
+		csr_mask = vcpu->arch.gprs[rj];
+		_kvm_emu_xchg_csr(vcpu, csrid, csr_mask, val);
+	}
+
+	return EMULATE_DONE;
+}