Message ID | 20230802205309.257392-7-afd@ti.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id z12-20020aa7d40c000000b0052307545125si947278edq.635.2023.08.02.14.26.58; Wed, 02 Aug 2023 14:27:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=gXWyAGF8; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232741AbjHBUyI (ORCPT <rfc822;maxi.paulin@gmail.com> + 99 others); Wed, 2 Aug 2023 16:54:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44790 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232708AbjHBUxb (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 2 Aug 2023 16:53:31 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACB6D1A5; Wed, 2 Aug 2023 13:53:26 -0700 (PDT) Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 372KrF6X098045; Wed, 2 Aug 2023 15:53:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1691009595; bh=e7Hj4FuyBxmorKTyYofLw+PErJZV5a7lGgU1QcTquOQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=gXWyAGF8Mct6Y1Jlo/XAYc3R9xjALKyeoZLKTodKQLYbavGNUdBVG5DLFyNvwbu8m 1IW8hxx1sqjdnhIlecWnaSJ2tBTiET8ps14LLvMteTB9LORsewYc1jHvekDOSVpGVl 4EtZLiZq/IkXfz+sct+Lt2uGrLafw8SJjjeOHa4c= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 372KrFQP071671 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 2 Aug 2023 15:53:15 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Wed, 2 Aug 2023 15:53:14 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Wed, 2 Aug 2023 15:53:14 -0500 Received: from lelv0326.itg.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 372KrASD090834; Wed, 2 Aug 2023 15:53:14 -0500 From: Andrew Davis <afd@ti.com> To: Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>, Tero Kristo <kristo@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, <linux-arm-kernel@lists.infradead.org> CC: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Andrew Davis <afd@ti.com> Subject: [PATCH 06/13] arm64: dts: ti: k3-j7200: Enable OSPI nodes at the board level Date: Wed, 2 Aug 2023 15:53:02 -0500 Message-ID: <20230802205309.257392-7-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230802205309.257392-1-afd@ti.com> References: <20230802205309.257392-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1773154224655002380 X-GMAIL-MSGID: 1773154224655002380 |
Series |
Another round of K3 DTSI disables
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Commit Message
Andrew Davis
Aug. 2, 2023, 8:53 p.m. UTC
OSPI nodes defined in the top-level J7200 SoC dtsi files are incomplete
and may not be functional unless they are extended with pinmux and
device information.
As the attached OSPI device is only known about at the board integration
level, these nodes should only be enabled when provided with this
information.
Disable the OSPI nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: Andrew Davis <afd@ti.com>
---
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 1 +
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 1 +
2 files changed, 2 insertions(+)
Comments
On 03/08/23 02:23, Andrew Davis wrote: > OSPI nodes defined in the top-level J7200 SoC dtsi files are incomplete > and may not be functional unless they are extended with pinmux and > device information. > > As the attached OSPI device is only known about at the board integration > level, these nodes should only be enabled when provided with this > information. Agree > > Disable the OSPI nodes in the dtsi files and only enable the ones that > are actually pinned out on a given board. > > Signed-off-by: Andrew Davis <afd@ti.com> > --- > arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 1 + > arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > index ee7860913c387..571eb0e2eac92 100644 > --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > @@ -544,6 +544,7 @@ ospi0: spi@47040000 { > power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; > #address-cells = <1>; > #size-cells = <0>; > + status = "disabled"; > }; > }; > > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi > index b37f4f88ece4f..5a300d4c8ba03 100644 > --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi > @@ -267,6 +267,7 @@ eeprom@50 { > }; > > &ospi0 { > + status = "okay"; Reviewed-by: Dhruva Gole <d-gole@ti.com> > pinctrl-names = "default"; > pinctrl-0 = <&mcu_fss0_ospi0_pins_default>; >
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index ee7860913c387..571eb0e2eac92 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -544,6 +544,7 @@ ospi0: spi@47040000 { power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi index b37f4f88ece4f..5a300d4c8ba03 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -267,6 +267,7 @@ eeprom@50 { }; &ospi0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;