diff mbox series

[RFC,v2,07/11] iio: adc: stm32-dfsdm: add scaling support to dfsdm

Message ID 20230727150324.1157933-8-olivier.moysan@foss.st.com
State New
Headers
Series iio: add iio backend device type |

Commit Message

Olivier MOYSAN July 27, 2023, 3:03 p.m. UTC 
  Add scaling support to STM32 DFSDM.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
---
 drivers/iio/adc/stm32-dfsdm-adc.c | 77 +++++++++++++++++++++++++++++--
 1 file changed, 73 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/iio/adc/stm32-dfsdm-adc.c b/drivers/iio/adc/stm32-dfsdm-adc.c
index 96f4e0c64cdc..dba1a8ef5451 100644
--- a/drivers/iio/adc/stm32-dfsdm-adc.c
+++ b/drivers/iio/adc/stm32-dfsdm-adc.c
@@ -9,6 +9,7 @@ 
 #include <linux/dmaengine.h>
 #include <linux/dma-mapping.h>
 #include <linux/iio/adc/stm32-dfsdm-adc.h>
+#include <linux/iio/backend.h>
 #include <linux/iio/buffer.h>
 #include <linux/iio/hw-consumer.h>
 #include <linux/iio/sysfs.h>
@@ -77,6 +78,7 @@  struct stm32_dfsdm_adc {
 
 	/* ADC specific */
 	unsigned int oversamp;
+	struct iio_backend **backend;
 	struct completion completion;
 	u32 *buffer;
 
@@ -600,6 +602,8 @@  static int stm32_dfsdm_channel_parse_of(struct stm32_dfsdm *dfsdm,
 					struct iio_chan_spec *ch)
 {
 	struct stm32_dfsdm_channel *df_ch;
+	struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
+	struct iio_backend *backend;
 	const char *of_str;
 	int ret, val;
 
@@ -648,6 +652,12 @@  static int stm32_dfsdm_channel_parse_of(struct stm32_dfsdm *dfsdm,
 	if (ret != -EINVAL)
 		df_ch->alt_si = 0;
 
+	backend = fwnode_iio_backend_get(node, 0);
+	if (IS_ERR(backend))
+		return dev_err_probe(&indio_dev->dev, PTR_ERR(backend), "Failed to get backend\n");
+
+	adc->backend[df_ch->id] = backend;
+
 	return 0;
 }
 
@@ -1091,7 +1101,7 @@  static int stm32_dfsdm_single_conv(struct iio_dev *indio_dev,
 {
 	struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
 	long timeout;
-	int ret;
+	int ret, idx = chan->scan_index;
 
 	reinit_completion(&adc->completion);
 
@@ -1101,6 +1111,13 @@  static int stm32_dfsdm_single_conv(struct iio_dev *indio_dev,
 	if (ret < 0)
 		return ret;
 
+	if (!adc->backend[idx]->ops->enable)
+		return -EINVAL;
+
+	ret = adc->backend[idx]->ops->enable(adc->backend[idx]);
+	if (ret < 0)
+		return ret;
+
 	ret = regmap_update_bits(adc->dfsdm->regmap, DFSDM_CR2(adc->fl_id),
 				 DFSDM_CR2_REOCIE_MASK, DFSDM_CR2_REOCIE(1));
 	if (ret < 0)
@@ -1134,6 +1151,8 @@  static int stm32_dfsdm_single_conv(struct iio_dev *indio_dev,
 	stm32_dfsdm_process_data(adc, res);
 
 stop_dfsdm:
+	ret = adc->backend[idx]->ops->disable(adc->backend[idx]);
+
 	stm32_dfsdm_stop_dfsdm(adc->dfsdm);
 
 	return ret;
@@ -1198,7 +1217,14 @@  static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev,
 				int *val2, long mask)
 {
 	struct stm32_dfsdm_adc *adc = iio_priv(indio_dev);
-	int ret;
+
+	struct stm32_dfsdm_filter *fl = &adc->dfsdm->fl_list[adc->fl_id];
+	struct stm32_dfsdm_filter_osr *flo = &fl->flo[fl->fast];
+	u32 max = flo->max << (flo->lshift - chan->scan_type.shift);
+	int ret, idx = chan->scan_index;
+
+	if (flo->lshift < chan->scan_type.shift)
+		max = flo->max >> (chan->scan_type.shift - flo->lshift);
 
 	switch (mask) {
 	case IIO_CHAN_INFO_RAW:
@@ -1232,6 +1258,41 @@  static int stm32_dfsdm_read_raw(struct iio_dev *indio_dev,
 		*val = adc->sample_freq;
 
 		return IIO_VAL_INT;
+
+	case IIO_CHAN_INFO_SCALE:
+		/*
+		 * Scale is expressed in mV.
+		 * When fast mode is disabled, actual resolution may be lower
+		 * than 2^n, where n=realbits-1.
+		 * This leads to underestimating input voltage. To
+		 * compensate this deviation, the voltage reference can be
+		 * corrected with a factor = realbits resolution / actual max
+		 */
+		adc->backend[idx]->ops->read_raw(adc->backend[idx], val, val2, mask);
+
+		*val = div_u64((u64)*val * (u64)BIT(DFSDM_DATA_RES - 1), max);
+		*val2 = chan->scan_type.realbits;
+		if (chan->differential)
+			*val *= 2;
+		return IIO_VAL_FRACTIONAL_LOG2;
+
+	case IIO_CHAN_INFO_OFFSET:
+		/*
+		 * DFSDM output data are in the range [-2^n,2^n],
+		 * with n=realbits-1.
+		 * - Differential modulator:
+		 * Offset correspond to SD modulator offset.
+		 * - Single ended modulator:
+		 * Input is in [0V,Vref] range, where 0V corresponds to -2^n, and Vref to 2^n.
+		 * Add 2^n to offset. (i.e. middle of input range)
+		 * offset = offset(sd) * vref / res(sd) * max / vref.
+		 */
+		adc->backend[idx]->ops->read_raw(adc->backend[idx], val, val2, mask);
+
+		*val = div_u64((u64)max * *val, BIT(*val2 - 1));
+		if (!chan->differential)
+			*val += max;
+		return IIO_VAL_INT;
 	}
 
 	return -EINVAL;
@@ -1360,7 +1421,10 @@  static int stm32_dfsdm_adc_chan_init_one(struct iio_dev *indio_dev,
 	 * IIO_CHAN_INFO_RAW: used to compute regular conversion
 	 * IIO_CHAN_INFO_OVERSAMPLING_RATIO: used to set oversampling
 	 */
-	ch->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
+	ch->info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
+				 BIT(IIO_CHAN_INFO_SCALE) |
+				 BIT(IIO_CHAN_INFO_OFFSET);
+
 	ch->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO) |
 					BIT(IIO_CHAN_INFO_SAMP_FREQ);
 
@@ -1451,7 +1515,12 @@  static int stm32_dfsdm_adc_init(struct device *dev, struct iio_dev *indio_dev)
 	if (!ch)
 		return -ENOMEM;
 
-	stm32_dfsdm_generic_chan_init(indio_dev, adc, ch);
+	adc->backend = devm_kzalloc(&indio_dev->dev, sizeof(*adc->backend) * adc->dfsdm->num_chs,
+				    GFP_KERNEL);
+	if (!adc->backend)
+		return -ENOMEM;
+
+	ret = stm32_dfsdm_generic_chan_init(indio_dev, adc, ch);
 	if (ret < 0)
 		return ret;