diff mbox series

[RFC,v2,09/11] ARM: dts: stm32: adopt new dfsdm bindings on stm32mp151

Message ID 20230727150324.1157933-10-olivier.moysan@foss.st.com
State New
Headers
Series iio: add iio backend device type |

Commit Message

Olivier MOYSAN July 27, 2023, 3:03 p.m. UTC 
  Adapt STM32MP151 device tree to match DFSDM new bindings.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
---
 arch/arm/boot/dts/st/stm32mp151.dtsi | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi
index 61508917521c..338457357248 100644
--- a/arch/arm/boot/dts/st/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp151.dtsi
@@ -970,7 +970,8 @@  dfsdm: dfsdm@4400d000 {
 
 			dfsdm0: filter@0 {
 				compatible = "st,stm32-dfsdm-adc";
-				#io-channel-cells = <1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
 				reg = <0>;
 				interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 				dmas = <&dmamux1 101 0x400 0x01>;
@@ -980,7 +981,8 @@  dfsdm0: filter@0 {
 
 			dfsdm1: filter@1 {
 				compatible = "st,stm32-dfsdm-adc";
-				#io-channel-cells = <1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
 				reg = <1>;
 				interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 				dmas = <&dmamux1 102 0x400 0x01>;
@@ -990,7 +992,8 @@  dfsdm1: filter@1 {
 
 			dfsdm2: filter@2 {
 				compatible = "st,stm32-dfsdm-adc";
-				#io-channel-cells = <1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
 				reg = <2>;
 				interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 				dmas = <&dmamux1 103 0x400 0x01>;
@@ -1000,7 +1003,8 @@  dfsdm2: filter@2 {
 
 			dfsdm3: filter@3 {
 				compatible = "st,stm32-dfsdm-adc";
-				#io-channel-cells = <1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
 				reg = <3>;
 				interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 				dmas = <&dmamux1 104 0x400 0x01>;
@@ -1010,7 +1014,8 @@  dfsdm3: filter@3 {
 
 			dfsdm4: filter@4 {
 				compatible = "st,stm32-dfsdm-adc";
-				#io-channel-cells = <1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
 				reg = <4>;
 				interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
 				dmas = <&dmamux1 91 0x400 0x01>;
@@ -1020,7 +1025,8 @@  dfsdm4: filter@4 {
 
 			dfsdm5: filter@5 {
 				compatible = "st,stm32-dfsdm-adc";
-				#io-channel-cells = <1>;
+				#address-cells = <1>;
+				#size-cells = <0>;
 				reg = <5>;
 				interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 				dmas = <&dmamux1 92 0x400 0x01>;