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[92.145.124.62]) by smtp.gmail.com with ESMTPSA id s23-20020a7bc397000000b003fba6a0c881sm4726178wmj.43.2023.07.27.07.29.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jul 2023 07:30:20 -0700 (PDT) From: Alexandre Ghiti <alexghiti@rivosinc.com> To: Jonathan Corbet <corbet@lwn.net>, Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>, Arnaldo Carvalho de Melo <acme@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Alexander Shishkin <alexander.shishkin@linux.intel.com>, Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>, Ian Rogers <irogers@google.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Atish Patra <atishp@atishpatra.org>, Anup Patel <anup@brainfault.org>, Will Deacon <will@kernel.org>, Rob Herring <robh@kernel.org>, Andrew Jones <ajones@ventanamicro.com>, =?utf-8?q?R=C3=A9mi_Denis-Courmont?= <remi@remlab.net>, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Alexandre Ghiti <alexghiti@rivosinc.com>, Atish Patra <atishp@rivosinc.com> Subject: [PATCH v4 10/10] perf: tests: Adapt mmap-basic.c for riscv Date: Thu, 27 Jul 2023 16:14:28 +0200 Message-Id: <20230727141428.962286-11-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230727141428.962286-1-alexghiti@rivosinc.com> References: <20230727141428.962286-1-alexghiti@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772585872206727723 X-GMAIL-MSGID: 1772585872206727723 |
Series |
riscv: Allow userspace to directly access perf counters
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Commit Message
Alexandre Ghiti
July 27, 2023, 2:14 p.m. UTC
riscv now supports mmaping hardware counters to userspace so adapt the test to run on this architecture. Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> --- tools/perf/tests/mmap-basic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Comments
On Thu, Jul 27, 2023 at 7:30 AM Alexandre Ghiti <alexghiti@rivosinc.com> wrote: > > riscv now supports mmaping hardware counters to userspace so adapt the test > to run on this architecture. > > Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > Reviewed-by: Atish Patra <atishp@rivosinc.com> > --- > tools/perf/tests/mmap-basic.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/tools/perf/tests/mmap-basic.c b/tools/perf/tests/mmap-basic.c > index e68ca6229756..f5075ca774f8 100644 > --- a/tools/perf/tests/mmap-basic.c > +++ b/tools/perf/tests/mmap-basic.c > @@ -284,7 +284,7 @@ static struct test_case tests__basic_mmap[] = { > "permissions"), > TEST_CASE_REASON("User space counter reading of instructions", > mmap_user_read_instr, > -#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) > +#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) || __riscv_xlen == 64 Same comment relating to the guard, why not defined(__riscv) ? Thanks, Ian > "permissions" > #else > "unsupported" > @@ -292,7 +292,7 @@ static struct test_case tests__basic_mmap[] = { > ), > TEST_CASE_REASON("User space counter reading of cycles", > mmap_user_read_cycles, > -#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) > +#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) || __riscv_xlen == 64 > "permissions" > #else > "unsupported" > -- > 2.39.2 >
On Fri, Jul 28, 2023 at 10:54:02AM -0700, Ian Rogers wrote: > On Thu, Jul 27, 2023 at 7:30 AM Alexandre Ghiti <alexghiti@rivosinc.com> wrote: > > > > riscv now supports mmaping hardware counters to userspace so adapt the test > > to run on this architecture. > > > > Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > > Reviewed-by: Atish Patra <atishp@rivosinc.com> > > --- > > tools/perf/tests/mmap-basic.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/tools/perf/tests/mmap-basic.c b/tools/perf/tests/mmap-basic.c > > index e68ca6229756..f5075ca774f8 100644 > > --- a/tools/perf/tests/mmap-basic.c > > +++ b/tools/perf/tests/mmap-basic.c > > @@ -284,7 +284,7 @@ static struct test_case tests__basic_mmap[] = { > > "permissions"), > > TEST_CASE_REASON("User space counter reading of instructions", > > mmap_user_read_instr, > > -#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) > > +#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) || __riscv_xlen == 64 > > Same comment relating to the guard, why not defined(__riscv) ? __riscv_xlen will always be defined for all riscv targets, so also checking __riscv isn't necessary when a specific bit width also needs to be checked. __riscv is useful for checks that don't need to be concerned with the bit width. Grepping, I see instances of both "defined(__riscv) && __riscv_xlen ==" and just "__riscv_xlen ==". IMHO, the former should be reduced to the latter, rather than creating more instances of them. Thanks, drew
diff --git a/tools/perf/tests/mmap-basic.c b/tools/perf/tests/mmap-basic.c index e68ca6229756..f5075ca774f8 100644 --- a/tools/perf/tests/mmap-basic.c +++ b/tools/perf/tests/mmap-basic.c @@ -284,7 +284,7 @@ static struct test_case tests__basic_mmap[] = { "permissions"), TEST_CASE_REASON("User space counter reading of instructions", mmap_user_read_instr, -#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) +#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) || __riscv_xlen == 64 "permissions" #else "unsupported" @@ -292,7 +292,7 @@ static struct test_case tests__basic_mmap[] = { ), TEST_CASE_REASON("User space counter reading of cycles", mmap_user_read_cycles, -#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) +#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) || __riscv_xlen == 64 "permissions" #else "unsupported"