Message ID | 20230726051759.30038-1-sunilvl@ventanamicro.com |
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State | New |
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J . Bottomley" <jejb@linux.ibm.com>, "Martin K . Petersen" <martin.petersen@oracle.com>, Palmer Dabbelt <palmer@rivosinc.com>, Andrew Jones <ajones@ventanamicro.com>, Conor Dooley <conor.dooley@microchip.com>, Sunil V L <sunilvl@ventanamicro.com>, kernel test robot <lkp@intel.com> Subject: [PATCH] scsi: hisi_sas: Fix warning detected by sparse Date: Wed, 26 Jul 2023 10:47:59 +0530 Message-Id: <20230726051759.30038-1-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772463295739466117 X-GMAIL-MSGID: 1772463295739466117 |
Series |
scsi: hisi_sas: Fix warning detected by sparse
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Commit Message
Sunil V L
July 26, 2023, 5:17 a.m. UTC
LKP reports below warning when building for RISC-V
with randconfig configuration.
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c:4567:35: sparse:
sparse: incorrect type in argument 4 (different base types)
@@ expected restricted __le32 [usertype] *[assigned] ptr
@@ got unsigned int * @@
Type cast to fix this warning.
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202307260823.whMNpZ1C-lkp@intel.com/
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Comments
Hi Sunil, 在 2023/7/26 星期三 13:17, Sunil V L 写道: > LKP reports below warning when building for RISC-V > with randconfig configuration. > > drivers/scsi/hisi_sas/hisi_sas_v3_hw.c:4567:35: sparse: > sparse: incorrect type in argument 4 (different base types) > @@ expected restricted __le32 [usertype] *[assigned] ptr > @@ got unsigned int * @@ > > Type cast to fix this warning. > > Reported-by: kernel test robot <lkp@intel.com> > Closes: https://lore.kernel.org/oe-kbuild-all/202307260823.whMNpZ1C-lkp@intel.com/ > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Xiang Chen <chenxiang66@hisilicon.com> Thanks! > --- > drivers/scsi/hisi_sas/hisi_sas_v3_hw.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c > index 20e1607c6282..6cd2e485d35b 100644 > --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c > +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c > @@ -4576,7 +4576,7 @@ static int debugfs_fifo_data_v3_hw_show(struct seq_file *s, void *p) > debugfs_read_fifo_data_v3_hw(phy); > > debugfs_show_row_32_v3_hw(s, 0, HISI_SAS_FIFO_DATA_DW_SIZE * 4, > - phy->fifo.rd_data); > + (__le32 *)phy->fifo.rd_data); > > return 0; > }
Sunil, > LKP reports below warning when building for RISC-V with randconfig > configuration. Applied to 6.6/scsi-staging, thanks!
On Wed, 26 Jul 2023 10:47:59 +0530, Sunil V L wrote: > LKP reports below warning when building for RISC-V > with randconfig configuration. > > drivers/scsi/hisi_sas/hisi_sas_v3_hw.c:4567:35: sparse: > sparse: incorrect type in argument 4 (different base types) > @@ expected restricted __le32 [usertype] *[assigned] ptr > @@ got unsigned int * @@ > > [...] Applied to 6.6/scsi-queue, thanks! [1/1] scsi: hisi_sas: Fix warning detected by sparse https://git.kernel.org/mkp/scsi/c/b7fc2caf20ea
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c index 20e1607c6282..6cd2e485d35b 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c @@ -4576,7 +4576,7 @@ static int debugfs_fifo_data_v3_hw_show(struct seq_file *s, void *p) debugfs_read_fifo_data_v3_hw(phy); debugfs_show_row_32_v3_hw(s, 0, HISI_SAS_FIFO_DATA_DW_SIZE * 4, - phy->fifo.rd_data); + (__le32 *)phy->fifo.rd_data); return 0; }