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Mon, 24 Jul 2023 03:46:53 -0500 Received: from xhdlakshmis40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Mon, 24 Jul 2023 03:46:21 -0500 From: Sai Krishna Potthuri To: Linus Walleij , Michal Simek , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mathieu Poirier , Tanmay Shah , Ben Levinsky , Marek Vasut , Roman Gushchin , Arnd Bergmann CC: , , , , , , Sai Krishna Potthuri Subject: [PATCH v2 3/4] dt-bindings: pinctrl-zynqmp: Add output-enable configuration Date: Mon, 24 Jul 2023 14:15:53 +0530 Message-ID: <20230724084554.1924378-4-sai.krishna.potthuri@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230724084554.1924378-1-sai.krishna.potthuri@amd.com> References: <20230724084554.1924378-1-sai.krishna.potthuri@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT068:EE_|CYYPR12MB8923:EE_ X-MS-Office365-Filtering-Correlation-Id: 9e740adb-c6a0-46e6-2837-08db8c2296ce X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Using these pinctrl properties observed hang issues with older Xilinx ZynqMP Platform Management Firmware, hence reverted the patch previously. Commit ff8356060e3a5e126abb ("Revert "dt-bindings: pinctrl-zynqmp: Add output-enable configuration""). Support for configuring these properties added in Xilinx ZynqMP Platform Management firmware(PMUFW) Configuration Set version 2.0. Linux firmware driver checks if the configuration is supported by the PMUFW when it gets request for TRISTATE configuration from pinctrl driver. If it supports, then calls will be made otherwise it returns error. Signed-off-by: Sai Krishna Potthuri Acked-by: Conor Dooley --- .../devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml index 2722dc7bb03d..1e2b9b627b12 100644 --- a/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/xlnx,zynqmp-pinctrl.yaml @@ -274,6 +274,10 @@ patternProperties: slew-rate: enum: [0, 1] + output-enable: + description: + This will internally disable the tri-state for MIO pins. + drive-strength: description: Selects the drive strength for MIO pins, in mA.