From patchwork Sun Jul 23 16:08:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marijn Suijten X-Patchwork-Id: 124486 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:9010:0:b0:3e4:2afc:c1 with SMTP id l16csp1334193vqg; Sun, 23 Jul 2023 09:22:27 -0700 (PDT) X-Google-Smtp-Source: APBJJlE3/3mB+T3+l+3lj61dkXxzIhCI6XhTRDyrj83qewuGv7oqT/S/SDNWAVyTkOBulfanNuDH X-Received: by 2002:a05:6a00:2349:b0:686:22de:6365 with SMTP id j9-20020a056a00234900b0068622de6365mr8305683pfj.8.1690129347276; Sun, 23 Jul 2023 09:22:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1690129347; cv=none; d=google.com; s=arc-20160816; b=NtmWQedhrW9O46LqFHWGC8vxnkSx55OJ8pK4LJD2hEl84xeOWNl79XJGMjmb/dxadF O5HrriK2WlP5A991tKJMDmsw/XD5WxqGjGVjN27S6wnt7XMCaPD4vTCpd/ig0LkmFY6F G2XKngrX0KcnzBw/JtKHriUopk1g8nQZpsov78NCISgaKaFquYCazICFWhb9eR7LMsju k+C+b5TlsfrHzZE4L39hYgHzifwI0wiC8BWJCIji+a0LspSlyPhsmU83xekAAv8skEbH OgnrE5gJP/y/Y72ZjXfF07n1z4XWVub55Ngc/Ue/yqeUUSdEX8J75w8NFIxZGMSMiemz oIPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:in-reply-to:references:message-id :content-transfer-encoding:mime-version:subject:date:from; bh=foYixx6IjO1Hg+/WIpSCL/yFbh4luJn3VdcMWFkizbM=; fh=iqz7oRQIyFPzKfYtMH2XRwjdfOOz2hPKEmrmNt7b2jU=; b=gR7PVW/Rs09vvO2oDYTxhVGXHNZR5CNKI6gDr7Fo2w6cX65YPuAntv+HcT//Aad22A 4s7DYevPooKjfoTlU5c+w3IT8TKq292yfl8DEoyZ9TjwMW/Oo8Z36zvtMneMM75cZFd8 tQ3GKEkMSTZTMA0CkwmJ/RmiqS9bXcTaMfEajGW8zNWid1E6O24GG25e2ffQuW1kvafO e71xqi3WTs3AogHfIRO8w/qsP7Cfv9jk3B9VO1N6X+G2YbcnygyTSSN2jySVuNhcWGej EODJ8G7RjwtNsJPhHP4Uw/cBzvbX6OtBgkDLTPp/uKY1aFnGHA0IvBTc2fFQ0jGkwTiA Ds0w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q21-20020a656a95000000b0055c71125c22si7462708pgu.230.2023.07.23.09.22.10; Sun, 23 Jul 2023 09:22:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229651AbjGWQJi (ORCPT + 99 others); Sun, 23 Jul 2023 12:09:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33750 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230095AbjGWQJR (ORCPT ); Sun, 23 Jul 2023 12:09:17 -0400 Received: from relay05.th.seeweb.it (relay05.th.seeweb.it [5.144.164.166]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B59D171F; Sun, 23 Jul 2023 09:09:01 -0700 (PDT) Received: from Marijn-Arch-PC.localdomain (94-211-6-86.cable.dynamic.v4.ziggo.nl [94.211.6.86]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 4725F3F1C4; Sun, 23 Jul 2023 18:08:58 +0200 (CEST) From: Marijn Suijten Date: Sun, 23 Jul 2023 18:08:52 +0200 Subject: [PATCH v4 14/17] arm64: dts: qcom: sm6125: Switch fixed xo_board clock to RPM XO clock MIME-Version: 1.0 Message-Id: <20230723-sm6125-dpu-v4-14-a3f287dd6c07@somainline.org> References: <20230723-sm6125-dpu-v4-0-a3f287dd6c07@somainline.org> In-Reply-To: <20230723-sm6125-dpu-v4-0-a3f287dd6c07@somainline.org> To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Krishna Manikandan , Marijn Suijten , Loic Poulain , Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Lux Aliaga X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1772229070736925116 X-GMAIL-MSGID: 1772229070736925116 We have a working RPM XO clock; no other driver except rpmcc should be parenting directly to the fixed-factor xo_board clock nor should it be reachable by that global name. Remove the name to that effect, so that every clock relation is explicitly defined in DTS. Reviewed-by: Konrad Dybcio Signed-off-by: Marijn Suijten --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index cfd0901d4555..90e242ad7943 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -23,7 +23,6 @@ xo_board: xo-board { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <19200000>; - clock-output-names = "xo_board"; }; sleep_clk: sleep-clk { @@ -199,6 +198,8 @@ rpm_requests: rpm-requests { rpmcc: clock-controller { compatible = "qcom,rpmcc-sm6125", "qcom,rpmcc"; #clock-cells = <1>; + clocks = <&xo_board>; + clock-names = "xo"; }; rpmpd: power-controller { @@ -718,7 +719,7 @@ sdhc_1: mmc@4744000 { clocks = <&gcc GCC_SDCC1_AHB_CLK>, <&gcc GCC_SDCC1_APPS_CLK>, - <&xo_board>; + <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "iface", "core", "xo"; iommus = <&apps_smmu 0x160 0x0>; @@ -745,7 +746,7 @@ sdhc_2: mmc@4784000 { clocks = <&gcc GCC_SDCC2_AHB_CLK>, <&gcc GCC_SDCC2_APPS_CLK>, - <&xo_board>; + <&rpmcc RPM_SMD_XO_CLK_SRC>; clock-names = "iface", "core", "xo"; iommus = <&apps_smmu 0x180 0x0>;