Message ID | 20230722111909.15166-15-nikunj@amd.com |
---|---|
State | New |
Headers |
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Sat, 22 Jul 2023 06:20:57 -0500 From: Nikunj A Dadhania <nikunj@amd.com> To: <linux-kernel@vger.kernel.org>, <x86@kernel.org> CC: <bp@alien8.de>, <thomas.lendacky@amd.com>, <dionnaglaze@google.com>, <pgonda@google.com>, <seanjc@google.com>, <pbonzini@redhat.com>, <nikunj@amd.com> Subject: [PATCH v3 14/14] x86/sev: Enable Secure TSC for SNP guests Date: Sat, 22 Jul 2023 16:49:09 +0530 Message-ID: <20230722111909.15166-15-nikunj@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230722111909.15166-1-nikunj@amd.com> References: <20230722111909.15166-1-nikunj@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT115:EE_|CH0PR12MB5283:EE_ X-MS-Office365-Filtering-Correlation-Id: 31318545-2a7c-47a8-0907-08db8aa5ba90 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Series |
Add Secure TSC support for SNP guests
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Commit Message
Nikunj A. Dadhania
July 22, 2023, 11:19 a.m. UTC
Now that all the required plumbing is done for enabling SNP
Secure TSC feature, add Secure TSC to snp features present list.
The CC_ATTR_GUEST_SECURE_TSC can be used by the guest to query whether
the SNP guest has Secure TSC feature active.
Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
---
arch/x86/boot/compressed/sev.c | 2 +-
arch/x86/mm/mem_encrypt.c | 10 ++++++++--
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c index 014b89c89088..11f951caf2de 100644 --- a/arch/x86/boot/compressed/sev.c +++ b/arch/x86/boot/compressed/sev.c @@ -313,7 +313,7 @@ static void enforce_vmpl0(void) * by the guest kernel. As and when a new feature is implemented in the * guest kernel, a corresponding bit should be added to the mask. */ -#define SNP_FEATURES_PRESENT (0) +#define SNP_FEATURES_PRESENT (MSR_AMD64_SNP_SECURE_TSC) void snp_check_features(void) { diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index 01abecc9a774..26608b9f2ca7 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -69,8 +69,14 @@ static void print_mem_encrypt_feature_info(void) pr_cont(" SEV-ES"); /* Secure Nested Paging */ - if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP)) - pr_cont(" SEV-SNP"); + if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP)) { + pr_cont(" SEV-SNP\n"); + pr_cont("SNP Features active: "); + + /* SNP Secure TSC */ + if (cc_platform_has(CC_ATTR_GUEST_SECURE_TSC)) + pr_cont(" SECURE-TSC"); + } pr_cont("\n"); }