[v2,3/3] ARM: dts: imx6: phycore: Rely on PMIC reboot/reset handler

Message ID 20230719114328.2239818-3-andrej.picej@norik.com
State New
Headers
Series [v2,1/3] ARM: dts: imx6: phytec: fix RTC interrupt level |

Commit Message

Andrej Picej July 19, 2023, 11:43 a.m. UTC
  Due to the missing signal connection between i.MX6 WDOG_B pin and the
PMICs external reset, the internal i.MX6 watchdog is not able to reset
the phyCORE i.MX6 SoM properly. Thus disable the internal i.MX6 watchdog
to prevent unexpected PMIC settings after reset.

NOTE: This patch should not be backported as it might break existing
uses and fixes in bootloaders.

Signed-off-by: Andrej Picej <andrej.picej@norik.com>
---
Changes in v2:
 - new patch
 - i.MX6 phyCOREs have the same problem as phyFLEX devices.
---
 arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
  

Comments

Shawn Guo July 30, 2023, 6:42 a.m. UTC | #1
On Wed, Jul 19, 2023 at 01:43:28PM +0200, Andrej Picej wrote:
> Due to the missing signal connection between i.MX6 WDOG_B pin and the
> PMICs external reset, the internal i.MX6 watchdog is not able to reset
> the phyCORE i.MX6 SoM properly. Thus disable the internal i.MX6 watchdog
> to prevent unexpected PMIC settings after reset.
> 
> NOTE: This patch should not be backported as it might break existing
> uses and fixes in bootloaders.
> 
> Signed-off-by: Andrej Picej <andrej.picej@norik.com>

Applied, thanks!
  

Patch

diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi
index 28a805384668..86b4269e0e01 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi
@@ -309,3 +309,11 @@  MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
 		>;
 	};
 };
+
+&wdog1 {
+	/*
+	 * Rely on PMIC reboot handler. Internal i.MX6 watchdog, that is also
+	 * used for reboot, does not reset all external PMIC voltages on reset.
+	 */
+	status = "disabled";
+};