Message ID | 20230719102057.22329-2-minda.chen@starfivetech.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id j20-20020aa7c414000000b005219932463dsi2893826edq.457.2023.07.19.03.31.42; Wed, 19 Jul 2023 03:32:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230449AbjGSKVM (ORCPT <rfc822;assdfgzxcv4@gmail.com> + 99 others); Wed, 19 Jul 2023 06:21:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42946 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230044AbjGSKVE (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 19 Jul 2023 06:21:04 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 75C5E1BF5; Wed, 19 Jul 2023 03:21:02 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 24E2124E225; Wed, 19 Jul 2023 18:21:01 +0800 (CST) Received: from EXMBX171.cuchost.com (172.16.6.91) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 19 Jul 2023 18:21:01 +0800 Received: from ubuntu.localdomain (113.72.147.86) by EXMBX171.cuchost.com (172.16.6.91) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 19 Jul 2023 18:20:59 +0800 From: Minda Chen <minda.chen@starfivetech.com> To: Daire McNamara <daire.mcnamara@microchip.com>, Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Bjorn Helgaas <bhelgaas@google.com>, Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= <kw@linux.com>, Emil Renner Berthing <emil.renner.berthing@canonical.com> CC: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>, <linux-pci@vger.kernel.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Philipp Zabel <p.zabel@pengutronix.de>, Mason Huo <mason.huo@starfivetech.com>, Leyfoon Tan <leyfoon.tan@starfivetech.com>, Kevin Xie <kevin.xie@starfivetech.com>, Minda Chen <minda.chen@starfivetech.com> Subject: [PATCH v1 1/9] dt-bindings: PCI: Add PLDA XpressRICH PCIe host common properties Date: Wed, 19 Jul 2023 18:20:49 +0800 Message-ID: <20230719102057.22329-2-minda.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230719102057.22329-1-minda.chen@starfivetech.com> References: <20230719102057.22329-1-minda.chen@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [113.72.147.86] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX171.cuchost.com (172.16.6.91) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771844641945301479 X-GMAIL-MSGID: 1771844641945301479 |
Series |
Refactoring Microchip PolarFire PCIe driver
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Commit Message
Minda Chen
July 19, 2023, 10:20 a.m. UTC
Add PLDA XpressRICH PCIe host common properties dt-binding doc. Microchip PolarFire PCIe host using PLDA IP. Extract properties from Microchip PolarFire PCIe host. Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> --- .../pci/plda,xpressrich-pcie-common.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml
Comments
On 19/07/2023 12:20, Minda Chen wrote: > Add PLDA XpressRICH PCIe host common properties dt-binding doc. > Microchip PolarFire PCIe host using PLDA IP. > Extract properties from Microchip PolarFire PCIe host. > > Signed-off-by: Minda Chen <minda.chen@starfivetech.com> > Reviewed-by: Hal Feng <hal.feng@starfivetech.com> > --- > .../pci/plda,xpressrich-pcie-common.yaml | 72 +++++++++++++++++++ > 1 file changed, 72 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml How is it related with existing plda,xpressrich3-axi? > > diff --git a/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml > new file mode 100644 > index 000000000000..3627a846c5d1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml > @@ -0,0 +1,72 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pci/plda,xpressrich-pcie-common.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: PLDA XpressRICH PCIe host common properties > + > +maintainers: > + - Daire McNamara <daire.mcnamara@microchip.com> > + - Minda Chen <minda.chen@starfivetech.com> > + > +description: > + Generic PLDA XpressRICH PCIe host common properties. > + > +select: false This should not be needed. > + > +properties: > + reg: > + description: > + At least host IP register set and configuration space are "At least" does not fit here since you do not allow anything else. > + required for normal controller work. > + maxItems: 2 > + > + reg-names: > + oneOf: > + - items: > + - const: cfg > + - const: apb > + - items: > + - const: host > + - const: cfg Maybe keep similar order, so cfg followed by host? Best regards, Krzysztof
On Wed, Jul 19, 2023 at 06:20:49PM +0800, Minda Chen wrote: > Add PLDA XpressRICH PCIe host common properties dt-binding doc. > Microchip PolarFire PCIe host using PLDA IP. > Extract properties from Microchip PolarFire PCIe host. > > Signed-off-by: Minda Chen <minda.chen@starfivetech.com> > Reviewed-by: Hal Feng <hal.feng@starfivetech.com> > --- > .../pci/plda,xpressrich-pcie-common.yaml | 72 +++++++++++++++++++ > 1 file changed, 72 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml > > diff --git a/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml > new file mode 100644 > index 000000000000..3627a846c5d1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml > @@ -0,0 +1,72 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pci/plda,xpressrich-pcie-common.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: PLDA XpressRICH PCIe host common properties > + > +maintainers: > + - Daire McNamara <daire.mcnamara@microchip.com> > + - Minda Chen <minda.chen@starfivetech.com> > + > +description: > + Generic PLDA XpressRICH PCIe host common properties. > + > +select: false > + > +properties: > + reg: > + description: > + At least host IP register set and configuration space are > + required for normal controller work. > + maxItems: 2 > + > + reg-names: > + oneOf: > + - items: > + - const: cfg > + - const: apb > + - items: > + - const: host > + - const: cfg This didn't exist before. Where's the reasoning? There's no reason for 'cfg' to be in different spots and little reason to have different names for the host/apb space. Rob
On 2023/7/20 6:31, Rob Herring wrote: > On Wed, Jul 19, 2023 at 06:20:49PM +0800, Minda Chen wrote: >> Add PLDA XpressRICH PCIe host common properties dt-binding doc. >> Microchip PolarFire PCIe host using PLDA IP. >> Extract properties from Microchip PolarFire PCIe host. >> >> Signed-off-by: Minda Chen <minda.chen@starfivetech.com> >> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> >> --- >> .../pci/plda,xpressrich-pcie-common.yaml | 72 +++++++++++++++++++ >> 1 file changed, 72 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml >> >> diff --git a/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml >> new file mode 100644 >> index 000000000000..3627a846c5d1 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml >> @@ -0,0 +1,72 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/pci/plda,xpressrich-pcie-common.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: PLDA XpressRICH PCIe host common properties >> + >> +maintainers: >> + - Daire McNamara <daire.mcnamara@microchip.com> >> + - Minda Chen <minda.chen@starfivetech.com> >> + >> +description: >> + Generic PLDA XpressRICH PCIe host common properties. >> + >> +select: false >> + >> +properties: >> + reg: >> + description: >> + At least host IP register set and configuration space are >> + required for normal controller work. >> + maxItems: 2 >> + >> + reg-names: >> + oneOf: >> + - items: >> + - const: cfg >> + - const: apb >> + - items: >> + - const: host >> + - const: cfg > > This didn't exist before. Where's the reasoning? > > There's no reason for 'cfg' to be in different spots and little reason > to have different names for the host/apb space. > > Rob > ok, I will follow cfg and apb
On 2023/7/19 18:52, Krzysztof Kozlowski wrote: > On 19/07/2023 12:20, Minda Chen wrote: >> Add PLDA XpressRICH PCIe host common properties dt-binding doc. >> Microchip PolarFire PCIe host using PLDA IP. >> Extract properties from Microchip PolarFire PCIe host. >> >> Signed-off-by: Minda Chen <minda.chen@starfivetech.com> >> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> >> --- >> .../pci/plda,xpressrich-pcie-common.yaml | 72 +++++++++++++++++++ >> 1 file changed, 72 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml > > How is it related with existing plda,xpressrich3-axi? > yes, I just found plda,xpressrich3-axi. It is same IP in ARM juno soc. But it is firmware-initialized while microchip and starfive not. maybe I can rename this file to plda,xpressrich3-axi-common.yaml >> >> diff --git a/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml >> new file mode 100644 >> index 000000000000..3627a846c5d1 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml >> @@ -0,0 +1,72 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/pci/plda,xpressrich-pcie-common.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: PLDA XpressRICH PCIe host common properties >> + >> +maintainers: >> + - Daire McNamara <daire.mcnamara@microchip.com> >> + - Minda Chen <minda.chen@starfivetech.com> >> + >> +description: >> + Generic PLDA XpressRICH PCIe host common properties. >> + >> +select: false > > This should not be needed. > ok >> + >> +properties: >> + reg: >> + description: >> + At least host IP register set and configuration space are > > "At least" does not fit here since you do not allow anything else. > I will delete "At least" >> + required for normal controller work. >> + maxItems: 2 >> + >> + reg-names: >> + oneOf: >> + - items: >> + - const: cfg >> + - const: apb >> + - items: >> + - const: host >> + - const: cfg > > Maybe keep similar order, so cfg followed by host? > I will follow cfg, apb > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml new file mode 100644 index 000000000000..3627a846c5d1 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/plda,xpressrich-pcie-common.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/plda,xpressrich-pcie-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PLDA XpressRICH PCIe host common properties + +maintainers: + - Daire McNamara <daire.mcnamara@microchip.com> + - Minda Chen <minda.chen@starfivetech.com> + +description: + Generic PLDA XpressRICH PCIe host common properties. + +select: false + +properties: + reg: + description: + At least host IP register set and configuration space are + required for normal controller work. + maxItems: 2 + + reg-names: + oneOf: + - items: + - const: cfg + - const: apb + - items: + - const: host + - const: cfg + + interrupts: + minItems: 1 + items: + - description: PCIe host controller + - description: builtin MSI controller + + interrupt-names: + minItems: 1 + items: + - const: pcie + - const: msi + + msi-controller: + description: Identifies the node as an MSI controller. + + msi-parent: + description: MSI controller the device is capable of using. + + interrupt-controller: + type: object + properties: + '#address-cells': + const: 0 + + '#interrupt-cells': + const: 1 + + interrupt-controller: true + + required: + - '#address-cells' + - '#interrupt-cells' + - interrupt-controller + + additionalProperties: false + +additionalProperties: true + +...