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[v2,15/15] arm64: dts: qcom: sm6115: Add VDD_CX to GPU_CC

Message ID	20230717-topic-branch_aon_cleanup-v2-15-2a583460ef26@linaro.org
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; From: Konrad Dybcio <konrad.dybcio@linaro.org> Date: Wed, 29 Nov 2023 19:59:34 +0100 Subject: [PATCH v2 15/15] arm64: dts: qcom: sm6115: Add VDD_CX to GPU_CC MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230717-topic-branch_aon_cleanup-v2-15-2a583460ef26@linaro.org> References: <20230717-topic-branch_aon_cleanup-v2-0-2a583460ef26@linaro.org> In-Reply-To: <20230717-topic-branch_aon_cleanup-v2-0-2a583460ef26@linaro.org> To: Bjorn Andersson <andersson@kernel.org>, Andy Gross <agross@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org> Cc: Marijn Suijten <marijn.suijten@somainline.org>, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio <konrad.dybcio@linaro.org> Precedence: bulk
Series	Unregister critical branch clocks + some RPM \| [v2,00/15] Unregister critical branch clocks + some RPM [v2,01/15] clk: qcom: branch: Add a helper for setting the enable bit [v2,02/15] clk: qcom: Use qcom_branch_set_clk_en() [v2,03/15] clk: qcom: gcc-sm6375: Unregister critical clocks [v2,04/15] clk: qcom: gcc-sm6375: Add runtime PM [v2,05/15] clk: qcom: gpucc-sm6375: Unregister critical clocks [v2,06/15] clk: qcom: gpucc-sm6115: Unregister critical clocks [v2,07/15] clk: qcom: gpucc-sm6115: Add runtime PM [v2,08/15] clk: qcom: gcc-sm6115: Unregister critical clocks [v2,09/15] clk: qcom: gcc-sm6115: Add runtime PM [v2,10/15] clk: qcom: gcc-qcm2290: Unregister critical clocks [v2,11/15] clk: qcom: gcc-qcm2290: Add runtime PM [v2,12/15] arm64: dts: qcom: sm6375: Add VDD_CX to GCC [v2,13/15] arm64: dts: qcom: qcm2290: Add VDD_CX to GCC [v2,14/15] arm64: dts: qcom: sm6115: Add VDD_CX to GCC [v2,15/15] arm64: dts: qcom: sm6115: Add VDD_CX to GPU_CC

Commit Message

Konrad Dybcio Nov. 29, 2023, 6:59 p.m. UTC

  The GPU_CC block is powered by VDD_CX. Link the power domain and
provide a reasonable minimum vote (lowest available on the platform)
to ensure the registers within are accessible.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 29b5b388cd94..bfaaa1801a4d 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -1430,6 +1430,8 @@  gpucc: clock-controller@5990000 {
 			clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
 				 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
 				 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
+			power-domains = <&rpmpd SM6115_VDDCX>;
+			required-opps = <&rpmpd_opp_low_svs>;
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 			#power-domain-cells = <1>;