[v2,5/6] net: phy: at803x: remove qca8081 1G fast retrain and slave seed config

Message ID 20230714063136.21368-6-quic_luoj@quicinc.com
State New
Headers
Series net: phy: at803x: support qca8081 1G version chip |

Commit Message

Jie Luo July 14, 2023, 6:31 a.m. UTC
  The fast retrain and master slave seed configs are only applicable when
the 2.5G capability is supported.

Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
---
 drivers/net/phy/at803x.c | 45 ++++++++++++++++++++++++----------------
 1 file changed, 27 insertions(+), 18 deletions(-)
  

Comments

Russell King (Oracle) July 14, 2023, 11:41 a.m. UTC | #1
On Fri, Jul 14, 2023 at 02:31:35PM +0800, Luo Jie wrote:
> The fast retrain and master slave seed configs are only applicable when
> the 2.5G capability is supported.

Probably worth a comment - or a helper function.

E.g.

static bool qca808x_has_fast_retrain(struct phy_device *phydev)
{
	return linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
				 phydev->supported);
}

Which then makes the code more self-documenting.
  
Jie Luo July 15, 2023, 2:54 p.m. UTC | #2
On 7/14/2023 7:41 PM, Russell King (Oracle) wrote:
> On Fri, Jul 14, 2023 at 02:31:35PM +0800, Luo Jie wrote:
>> The fast retrain and master slave seed configs are only applicable when
>> the 2.5G capability is supported.
> 
> Probably worth a comment - or a helper function.
> 
> E.g.
> 
> static bool qca808x_has_fast_retrain(struct phy_device *phydev)
> {
> 	return linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
> 				 phydev->supported);
> }
> 
> Which then makes the code more self-documenting.
> 

Hi Russell,
Thanks for this review comment, i will add this helper function in the 
next patch series.
  

Patch

diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
index cb4c45c81a85..5e9d2a4d8bbc 100644
--- a/drivers/net/phy/at803x.c
+++ b/drivers/net/phy/at803x.c
@@ -1766,20 +1766,24 @@  static int qca808x_config_init(struct phy_device *phydev)
 	if (ret)
 		return ret;
 
-	/* Config the fast retrain for the link 2500M */
-	ret = qca808x_phy_fast_retrain_config(phydev);
-	if (ret)
-		return ret;
-
-	ret = genphy_read_master_slave(phydev);
-	if (ret < 0)
-		return ret;
-
-	if (!qca808x_is_prefer_master(phydev)) {
-		/* Enable seed and configure lower ramdom seed to make phy linked as slave mode */
-		ret = qca808x_phy_ms_seed_enable(phydev, true);
+	if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported)) {
+		/* Config the fast retrain for the link 2500M */
+		ret = qca808x_phy_fast_retrain_config(phydev);
 		if (ret)
 			return ret;
+
+		ret = genphy_read_master_slave(phydev);
+		if (ret < 0)
+			return ret;
+
+		if (!qca808x_is_prefer_master(phydev)) {
+			/* Enable seed and configure lower ramdom seed to make phy
+			 * linked as slave mode.
+			 */
+			ret = qca808x_phy_ms_seed_enable(phydev, true);
+			if (ret)
+				return ret;
+		}
 	}
 
 	/* Configure adc threshold as 100mv for the link 10M */
@@ -1821,11 +1825,13 @@  static int qca808x_read_status(struct phy_device *phydev)
 		 * value is configured as the same value, the link can't be up and no link change
 		 * occurs.
 		 */
-		if (phydev->master_slave_state == MASTER_SLAVE_STATE_ERR ||
-				qca808x_is_prefer_master(phydev)) {
-			qca808x_phy_ms_seed_enable(phydev, false);
-		} else {
-			qca808x_phy_ms_seed_enable(phydev, true);
+		if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported)) {
+			if (phydev->master_slave_state == MASTER_SLAVE_STATE_ERR ||
+					qca808x_is_prefer_master(phydev)) {
+				qca808x_phy_ms_seed_enable(phydev, false);
+			} else {
+				qca808x_phy_ms_seed_enable(phydev, true);
+			}
 		}
 	}
 
@@ -1840,7 +1846,10 @@  static int qca808x_soft_reset(struct phy_device *phydev)
 	if (ret < 0)
 		return ret;
 
-	return qca808x_phy_ms_seed_enable(phydev, true);
+	if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported))
+		ret = qca808x_phy_ms_seed_enable(phydev, true);
+
+	return ret;
 }
 
 static bool qca808x_cdt_fault_length_valid(int cdt_code)