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[83.9.3.146]) by smtp.gmail.com with ESMTPSA id b6-20020ac25e86000000b004fb2244563fsm1482588lfq.289.2023.07.14.05.40.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 14 Jul 2023 05:40:52 -0700 (PDT) From: Konrad Dybcio Date: Fri, 14 Jul 2023 14:40:46 +0200 Subject: [PATCH 1/3] pinctrl: qcom: lpass-lpi: Make the clocks optional, always MIME-Version: 1.0 Message-Id: <20230714-topic-lpass_lpi_cleanup-v1-1-dc18b5bd14f7@linaro.org> References: <20230714-topic-lpass_lpi_cleanup-v1-0-dc18b5bd14f7@linaro.org> In-Reply-To: <20230714-topic-lpass_lpi_cleanup-v1-0-dc18b5bd14f7@linaro.org> To: Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla , cros-qcom-dts-watchers@chromium.org Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1689338449; l=1172; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=JjuJ8qCad7hrRpLN/xAgdh9in9df+oYi9FZ5wdlA/hQ=; b=3ikJXtJU50n5Ipa+iXkN77TNrKupAYLU+H3w/WnEq4vokZTXxAiSq9HAlEkvXq6tOH7jZug8M GKaTTr7O7WuBVQ7kpxLhAASLGFyCNXYdNF7PYaLvvbEUffy+CIRFX0O X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771401150692939146 X-GMAIL-MSGID: 1771401150692939146 Some platforms provide a single clock source to all LPASS peripherals, others provide two, and there are probably others that provide it through magic invisible-to-Linux wires. Rely on bindings to mandate the adequate number of clocks necessary. Signed-off-by: Konrad Dybcio --- drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c index fdb6585a9234..6cf6c734db17 100644 --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c @@ -438,11 +438,7 @@ int lpi_pinctrl_probe(struct platform_device *pdev) return dev_err_probe(dev, PTR_ERR(pctrl->slew_base), "Slew resource not provided\n"); - if (of_property_read_bool(dev->of_node, "qcom,adsp-bypass-mode")) - ret = devm_clk_bulk_get_optional(dev, MAX_LPI_NUM_CLKS, pctrl->clks); - else - ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks); - + ret = devm_clk_bulk_get_optional(dev, MAX_LPI_NUM_CLKS, pctrl->clks); if (ret) return ret;