[v2] mmc: renesas_sdhi: register irqs before registering controller
Commit Message
IRQs should be ready to serve when we call mmc_add_host() via
tmio_mmc_host_probe(). To achieve that, ensure that all irqs are masked
before registering the handlers.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Additionally tested on a Renesas Ebisu board (R-Car E3).
Changes since v1:
* refactored setting sdcard_irq_mask_all (Thanks Geert!)
* added tag
drivers/mmc/host/renesas_sdhi_core.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
Comments
On Wed, 12 Jul 2023 at 16:00, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
>
> IRQs should be ready to serve when we call mmc_add_host() via
> tmio_mmc_host_probe(). To achieve that, ensure that all irqs are masked
> before registering the handlers.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> Tested-by: Biju Das <biju.das.jz@bp.renesas.com>
Applied for next and by adding a stable tag, thanks!
Kind regards
Uffe
> ---
>
> Additionally tested on a Renesas Ebisu board (R-Car E3).
>
> Changes since v1:
> * refactored setting sdcard_irq_mask_all (Thanks Geert!)
> * added tag
>
> drivers/mmc/host/renesas_sdhi_core.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
> index 345934e4f59e..2d5ef9c37d76 100644
> --- a/drivers/mmc/host/renesas_sdhi_core.c
> +++ b/drivers/mmc/host/renesas_sdhi_core.c
> @@ -1006,6 +1006,8 @@ int renesas_sdhi_probe(struct platform_device *pdev,
> host->sdcard_irq_setbit_mask = TMIO_STAT_ALWAYS_SET_27;
> host->sdcard_irq_mask_all = TMIO_MASK_ALL_RCAR2;
> host->reset = renesas_sdhi_reset;
> + } else {
> + host->sdcard_irq_mask_all = TMIO_MASK_ALL;
> }
>
> /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
> @@ -1100,9 +1102,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
> host->ops.hs400_complete = renesas_sdhi_hs400_complete;
> }
>
> - ret = tmio_mmc_host_probe(host);
> - if (ret < 0)
> - goto edisclk;
> + sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);
>
> num_irqs = platform_irq_count(pdev);
> if (num_irqs < 0) {
> @@ -1129,6 +1129,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
> goto eirq;
> }
>
> + ret = tmio_mmc_host_probe(host);
> + if (ret < 0)
> + goto edisclk;
> +
> dev_info(&pdev->dev, "%s base at %pa, max clock rate %u MHz\n",
> mmc_hostname(host->mmc), &res->start, host->mmc->f_max / 1000000);
>
> --
> 2.30.2
>
@@ -1006,6 +1006,8 @@ int renesas_sdhi_probe(struct platform_device *pdev,
host->sdcard_irq_setbit_mask = TMIO_STAT_ALWAYS_SET_27;
host->sdcard_irq_mask_all = TMIO_MASK_ALL_RCAR2;
host->reset = renesas_sdhi_reset;
+ } else {
+ host->sdcard_irq_mask_all = TMIO_MASK_ALL;
}
/* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
@@ -1100,9 +1102,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
host->ops.hs400_complete = renesas_sdhi_hs400_complete;
}
- ret = tmio_mmc_host_probe(host);
- if (ret < 0)
- goto edisclk;
+ sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);
num_irqs = platform_irq_count(pdev);
if (num_irqs < 0) {
@@ -1129,6 +1129,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
goto eirq;
}
+ ret = tmio_mmc_host_probe(host);
+ if (ret < 0)
+ goto edisclk;
+
dev_info(&pdev->dev, "%s base at %pa, max clock rate %u MHz\n",
mmc_hostname(host->mmc), &res->start, host->mmc->f_max / 1000000);