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[2620:137:e000::1:20]) by mx.google.com with ESMTP id ca21-20020a056a00419500b006815bf78633si3240055pfb.315.2023.07.12.06.24.12; Wed, 12 Jul 2023 06:24:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@geanix.com header.s=default2211 header.b=iKLdktdO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=geanix.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233308AbjGLNCL (ORCPT + 99 others); Wed, 12 Jul 2023 09:02:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38452 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233290AbjGLNCI (ORCPT ); Wed, 12 Jul 2023 09:02:08 -0400 Received: from www530.your-server.de (www530.your-server.de [188.40.30.78]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 40C9719A0; Wed, 12 Jul 2023 06:02:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=geanix.com; s=default2211; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID; bh=cpKgppZl8ulkbXIgJLCOD2vHWLaNMHG3cGVGbdt6Zws=; b=iKLdktdO8veyvboAaxajGld5ks cTfymi2Ig1YJ68/569bSwbXreF2TLYUJ8tLThqRZhHZvtJPRYJp44juV2CW/+MElMT4qyOnSNjQf8 Pl9zeWdjD5NwIfEjABx2M8L8IjR++b1V2hf398xBziT94FumoTnPU+a/efGqa36vB2jTaZ9Bz95p3 TpyacIv7c2ReIrYfaXf2qjFzpO1WErYuTf001t6EKipTHVGYx0PgPX1Feh1BiBQSyeJhwAd15iNYe 1I5apkS65/Q3WWPcSV/j9pKDVdcEhKe+4v6zzD7ES78sL0wAFQ4BJQDqYr4gnBy/QIxBnKn3518NA KCXSsHHA==; Received: from sslproxy05.your-server.de ([78.46.172.2]) by www530.your-server.de with esmtpsa (TLS1.3) tls TLS_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1qJZBf-000NMC-Qe; Wed, 12 Jul 2023 14:43:19 +0200 Received: from [185.17.218.86] (helo=zen..) by sslproxy05.your-server.de with esmtpsa (TLSv1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1qJZBf-000L9W-5v; Wed, 12 Jul 2023 14:43:19 +0200 From: Sean Nyekjaer To: l.goehrs@pengutronix.de, a.fatoum@pengutronix.de, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue Cc: Sean Nyekjaer , dantuguf14105@gmail.com, Olivier Moysan , devicetree@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 3/9] ARM: dts: stm32: Add alternate pinmux for can pins Date: Wed, 12 Jul 2023 14:42:41 +0200 Message-Id: <20230712124248.2400862-3-sean@geanix.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230712124248.2400862-1-sean@geanix.com> References: <20230712124248.2400862-1-sean@geanix.com> MIME-Version: 1.0 X-Authenticated-Sender: sean@geanix.com X-Virus-Scanned: Clear (ClamAV 0.103.8/26967/Wed Jul 12 09:28:32 2023) X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771221302790976838 X-GMAIL-MSGID: 1771221302790976838 Add another mux option for can pins, this is used on Octavo OSD32MP1-RED board. Signed-off-by: Sean Nyekjaer Reviewed-by: Olivier Moysan --- arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi index 5de4ec547411..5af271e7f739 100644 --- a/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi @@ -1245,6 +1245,26 @@ pins { }; }; + m_can1_pins_d: m-can1-3 { + pins1 { + pinmux = ; /* CAN1_TX */ + slew-rate = <1>; + drive-push-pull; + bias-disable; + }; + pins2 { + pinmux = ; /* CAN1_RX */ + bias-disable; + }; + }; + + m_can1_sleep_pins_d: m_can1-sleep-3 { + pins { + pinmux = , /* CAN1_TX */ + ; /* CAN1_RX */ + }; + }; + m_can2_pins_a: m-can2-0 { pins1 { pinmux = ; /* CAN2_TX */