From patchwork Wed Jul 12 07:48:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Huang, Ying" X-Patchwork-Id: 118901 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a6b2:0:b0:3e4:2afc:c1 with SMTP id c18csp982382vqm; Wed, 12 Jul 2023 01:00:49 -0700 (PDT) X-Google-Smtp-Source: APBJJlESHyLSyJThgN4XwyyvHyO3TS8D1WCzMbN5MtAyz9aBMRmse+ZpCpLzhzawxrFDfNI6ixfk X-Received: by 2002:a17:902:e88e:b0:1b8:b3f9:58eb with SMTP id w14-20020a170902e88e00b001b8b3f958ebmr17154125plg.31.1689148849175; Wed, 12 Jul 2023 01:00:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1689148849; cv=none; d=google.com; s=arc-20160816; b=ngjGE3lmzpTk6Ngikuh+O2q+nIarcOP4dzMjjY8/4e6ZdLIBZQ1M5GXPggiHy6tOct +gkqyTLv4+gqm0ccXBqkLsN8Mdrjzdop203xUTJpRcZMf8M4xTAyvguncCDQmU19pNRx t/KgBH7zVUVQ9/QFoBCjbKUBbi+AVjjUCFfSPGoLHOzFWO+vRgfmx7bpZ0QKD+xtiXvF arYxh7qnlVhPhtafWwN7IHkkHHd16xqh6oIrn3Sp9hlcP4VTZEi6w0jZWbqHwDY3oeqv Tz+2y21CxW9UuoWtpDFEG9GcZsaTbaHLzz0ZQiLLRjT/1YJnhpBGMJukUaMgMwDcvdOh DvOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=57j5bkDByog/ext/hXgYlpRrsqAj6GMku5TIZq1E3C8=; fh=Xr6SCA0sZkk+kgDr9C2Ugn8MI7grTbNuIFF2Y8Jvxmw=; b=VwSGjqwYBY7SzT7y6YQUNQML/sg8et7tVcuF3zD/NiNlXUmxeww/y41KH8N8ojSE8R ySOXV0V+Se8BGBVBdPngacMPTU4tbd6hjJTBXP3YCl+OMJrUhYSleps3ZEjw1PsZM+ms Y3Hi+qm48+Ssp4Yg9oLIkb8qCBKbP/WbE4nbByoF8NnRrT6biAZh93mlb5XjGJ/ackfL vFoFhKOty78PBBZipJgnY6J1tQElxpvrnnTsiqS91w7V8d1+GRc5SOBuXaiCRU+MqpH9 +qk3X7GW9VIP879P/0MTTqXYJfvJ/i4rRMSYFdrF1Gi/AqtK4JzVGiXdHZmdvrVFXBWe TiUw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Y3rHazwQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i16-20020a170902c95000b001b9e9b21280si3059521pla.592.2023.07.12.01.00.29; Wed, 12 Jul 2023 01:00:49 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Y3rHazwQ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231716AbjGLHta (ORCPT + 99 others); Wed, 12 Jul 2023 03:49:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231706AbjGLHtZ (ORCPT ); Wed, 12 Jul 2023 03:49:25 -0400 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA0931992 for ; Wed, 12 Jul 2023 00:49:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1689148164; x=1720684164; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3Hn5VMwJGt0IXFlVjJsaiQl5L2c0xHT5vclGupSQt0Q=; b=Y3rHazwQdohGwbP8gjc7gmc7aysLvEkPaXs3BD6sMpvSMPoVPC+X3fKo PkDMUAzxnJjaig4VEYocpbCpE+DzgmkveGrONIoEdZg/qX/6BSzaZ9G9q 9/QJf6xe7CAnbwPwt/ohKVzir6z09BpeHB9kw6Slc2TvedtTsGIoiRVyd LCOiMilE8yJVRGHBJCZVX5Pw+amRE24LelqCuD4/TZKWm4rx6P/FKyBGh 9y4MGnoFiLRfF9UEcSqdJ9Hyxrb9v2pU+KuiKetHpA68r5kpx89hvFpob PcW7vi8rpznQ4sLu+gRSa4v5iBLyrCCTVvLm6JcMbbixJE/0NfLX3KJfo A==; X-IronPort-AV: E=McAfee;i="6600,9927,10768"; a="354734549" X-IronPort-AV: E=Sophos;i="6.01,199,1684825200"; d="scan'208";a="354734549" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2023 00:49:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10768"; a="698744883" X-IronPort-AV: E=Sophos;i="6.01,199,1684825200"; d="scan'208";a="698744883" Received: from yhuang6-mobl2.sh.intel.com ([10.238.6.30]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jul 2023 00:49:20 -0700 From: Huang Ying To: Andrew Morton Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org, Huang Ying , "Aneesh Kumar K . V" , Wei Xu , Alistair Popple , Dan Williams , Dave Hansen , Davidlohr Bueso , Johannes Weiner , Jonathan Cameron , Michal Hocko , Yang Shi , Rafael J Wysocki Subject: [PATCH 2/4] acpi, hmat: refactor hmat_register_target_initiators() Date: Wed, 12 Jul 2023 15:48:58 +0800 Message-Id: <20230712074900.404064-3-ying.huang@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230712074900.404064-1-ying.huang@intel.com> References: <20230712074900.404064-1-ying.huang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771200944036342634 X-GMAIL-MSGID: 1771200944036342634 Previously, in hmat_register_target_initiators(), the performance attributes are calculated and the corresponding sysfs links and files are created too. Which is called during memory onlining. But now, to calculate the abstract distance of a memory target before memory onlining, we need to calculate the performance attributes for a memory target without creating sysfs links and files. To do that, hmat_register_target_initiators() is refactored to make it possible to calculate performance attributes separately. Signed-off-by: "Huang, Ying" Cc: Aneesh Kumar K.V Cc: Wei Xu Cc: Alistair Popple Cc: Dan Williams Cc: Dave Hansen Cc: Davidlohr Bueso Cc: Johannes Weiner Cc: Jonathan Cameron Cc: Michal Hocko Cc: Yang Shi Cc: Rafael J Wysocki --- drivers/acpi/numa/hmat.c | 81 +++++++++++++++------------------------- 1 file changed, 30 insertions(+), 51 deletions(-) diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c index bba268ecd802..2dee0098f1a9 100644 --- a/drivers/acpi/numa/hmat.c +++ b/drivers/acpi/numa/hmat.c @@ -582,28 +582,25 @@ static int initiators_to_nodemask(unsigned long *p_nodes) return 0; } -static void hmat_register_target_initiators(struct memory_target *target) +static void hmat_update_target_attrs(struct memory_target *target, + unsigned long *p_nodes, int access) { - static DECLARE_BITMAP(p_nodes, MAX_NUMNODES); struct memory_initiator *initiator; - unsigned int mem_nid, cpu_nid; + unsigned int cpu_nid; struct memory_locality *loc = NULL; u32 best = 0; - bool access0done = false; int i; - mem_nid = pxm_to_node(target->memory_pxm); + bitmap_zero(p_nodes, MAX_NUMNODES); /* - * If the Address Range Structure provides a local processor pxm, link + * If the Address Range Structure provides a local processor pxm, set * only that one. Otherwise, find the best performance attributes and - * register all initiators that match. + * collect all initiators that match. */ if (target->processor_pxm != PXM_INVAL) { cpu_nid = pxm_to_node(target->processor_pxm); - register_memory_node_under_compute_node(mem_nid, cpu_nid, 0); - access0done = true; - if (node_state(cpu_nid, N_CPU)) { - register_memory_node_under_compute_node(mem_nid, cpu_nid, 1); + if (access == 0 || node_state(cpu_nid, N_CPU)) { + set_bit(target->processor_pxm, p_nodes); return; } } @@ -617,47 +614,10 @@ static void hmat_register_target_initiators(struct memory_target *target) * We'll also use the sorting to prime the candidate nodes with known * initiators. */ - bitmap_zero(p_nodes, MAX_NUMNODES); list_sort(NULL, &initiators, initiator_cmp); if (initiators_to_nodemask(p_nodes) < 0) return; - if (!access0done) { - for (i = WRITE_LATENCY; i <= READ_BANDWIDTH; i++) { - loc = localities_types[i]; - if (!loc) - continue; - - best = 0; - list_for_each_entry(initiator, &initiators, node) { - u32 value; - - if (!test_bit(initiator->processor_pxm, p_nodes)) - continue; - - value = hmat_initiator_perf(target, initiator, - loc->hmat_loc); - if (hmat_update_best(loc->hmat_loc->data_type, value, &best)) - bitmap_clear(p_nodes, 0, initiator->processor_pxm); - if (value != best) - clear_bit(initiator->processor_pxm, p_nodes); - } - if (best) - hmat_update_target_access(target, loc->hmat_loc->data_type, - best, 0); - } - - for_each_set_bit(i, p_nodes, MAX_NUMNODES) { - cpu_nid = pxm_to_node(i); - register_memory_node_under_compute_node(mem_nid, cpu_nid, 0); - } - } - - /* Access 1 ignores Generic Initiators */ - bitmap_zero(p_nodes, MAX_NUMNODES); - if (initiators_to_nodemask(p_nodes) < 0) - return; - for (i = WRITE_LATENCY; i <= READ_BANDWIDTH; i++) { loc = localities_types[i]; if (!loc) @@ -667,7 +627,7 @@ static void hmat_register_target_initiators(struct memory_target *target) list_for_each_entry(initiator, &initiators, node) { u32 value; - if (!initiator->has_cpu) { + if (access == 1 && !initiator->has_cpu) { clear_bit(initiator->processor_pxm, p_nodes); continue; } @@ -681,14 +641,33 @@ static void hmat_register_target_initiators(struct memory_target *target) clear_bit(initiator->processor_pxm, p_nodes); } if (best) - hmat_update_target_access(target, loc->hmat_loc->data_type, best, 1); + hmat_update_target_access(target, loc->hmat_loc->data_type, best, access); } +} + +static void __hmat_register_target_initiators(struct memory_target *target, + unsigned long *p_nodes, + int access) +{ + unsigned int mem_nid, cpu_nid; + int i; + + mem_nid = pxm_to_node(target->memory_pxm); + hmat_update_target_attrs(target, p_nodes, access); for_each_set_bit(i, p_nodes, MAX_NUMNODES) { cpu_nid = pxm_to_node(i); - register_memory_node_under_compute_node(mem_nid, cpu_nid, 1); + register_memory_node_under_compute_node(mem_nid, cpu_nid, access); } } +static void hmat_register_target_initiators(struct memory_target *target) +{ + static DECLARE_BITMAP(p_nodes, MAX_NUMNODES); + + __hmat_register_target_initiators(target, p_nodes, 0); + __hmat_register_target_initiators(target, p_nodes, 1); +} + static void hmat_register_target_cache(struct memory_target *target) { unsigned mem_nid = pxm_to_node(target->memory_pxm);