Message ID | 20230711082455.215983-5-anshuman.khandual@arm.com |
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State | New |
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Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a6b2:0:b0:3e4:2afc:c1 with SMTP id c18csp330403vqm; Tue, 11 Jul 2023 01:43:30 -0700 (PDT) X-Google-Smtp-Source: APBJJlGlPqZEhbd/f759bGgeyUf0vbMsY3e9ZndxQc2MqN3dUJ+nEycxpTrj3u6MxGg0iHn5otDS X-Received: by 2002:a05:6a20:3257:b0:120:1baf:e56e with SMTP id hm23-20020a056a20325700b001201bafe56emr15974743pzc.19.1689065010016; Tue, 11 Jul 2023 01:43:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1689065010; cv=none; d=google.com; s=arc-20160816; b=Cvtr8vlaCRYiL6FyPlz6fQrCm8pATQDQq0c5EBs54x6SG1/BK9MjseQsUaPZ2hRlkN NOE3MShOiFrYdTsw6chdRS1JBTLmpxUiEhGbs2cx8icX8uALJLc1cwSu7CF8SVKsjDTk 6YjP9rr/VU1o5SMTkR0i3NO+81Qvs0YUJPh0EkMKDiOTg4Y8UEFAQzwexJjUm/Ign1WL GnWE0d6Po1EFCHncKpXlC/SD4OrmmgNSxOHcj72mqFyq7bqgXYmcew5SEfTDttG10FqT zXBgv8eKRrFiMKcJ0uHYNYonJKXjAIsXRskeGH0UAm99oabdtgUyt6ur17RYhDU6Vpqd yr/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=7DVVDZhMoqfzQJYaYBJdQFBa4kbaLwgKeS1ZeqB8NE8=; fh=uKDf5R1eKBEpFB2sP5rwFdsisg1sKNqEQFf4Rrsmuig=; b=RFO6mjXCUOsyCYH3xBAf5Lw9+iArs0sGjQO4aAwkcpskdfxH7/ZZEgnHnFGhLX0AkO DguDBk+roBmVDgsgQwQSqqsGtSM3TJCtFyQ0i9NQvmpIhK3MKT7yY54RQ1gy/p15hQHf +voBPKieTadCPY0XG8kn28HHQhFQ6/MyTZc8RkK/XsHVBUhLREUAL88ZmrUlC+MfMxb5 DEy27NEzKmDgIpcVCiFSTCfJk3BulYc7JcIy3lcJjixW61eY4+rFu2R9PIvCtQkbpzoy Fde5wfHRQBp+2tDQMaQG3NrvTmADB8F4k1vcN3asA2PSPGnTju0KxutFZ+pYlkYHD05e 9WKA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id cd25-20020a056a00421900b0067de347ee12si1127961pfb.164.2023.07.11.01.43.17; Tue, 11 Jul 2023 01:43:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231328AbjGKIZs (ORCPT <rfc822;ybw1215001957@gmail.com> + 99 others); Tue, 11 Jul 2023 04:25:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231406AbjGKIZm (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Tue, 11 Jul 2023 04:25:42 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 1F1091728; Tue, 11 Jul 2023 01:25:32 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8DD5B2B; Tue, 11 Jul 2023 01:26:14 -0700 (PDT) Received: from a077893.arm.com (unknown [10.163.47.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 405B23F740; Tue, 11 Jul 2023 01:25:27 -0700 (PDT) From: Anshuman Khandual <anshuman.khandual@arm.com> To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com Cc: Anshuman Khandual <anshuman.khandual@arm.com>, Mark Brown <broonie@kernel.org>, James Clark <james.clark@arm.com>, Rob Herring <robh@kernel.org>, Marc Zyngier <maz@kernel.org>, Suzuki Poulose <suzuki.poulose@arm.com>, Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>, Arnaldo Carvalho de Melo <acme@kernel.org>, linux-perf-users@vger.kernel.org Subject: [PATCH V13 - RESEND 04/10] arm64/perf: Add branch stack support in struct pmu_hw_events Date: Tue, 11 Jul 2023 13:54:49 +0530 Message-Id: <20230711082455.215983-5-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230711082455.215983-1-anshuman.khandual@arm.com> References: <20230711082455.215983-1-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771113031811007073 X-GMAIL-MSGID: 1771113031811007073 |
Series |
arm64/perf: Enable branch stack sampling
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Commit Message
Anshuman Khandual
July 11, 2023, 8:24 a.m. UTC
This adds branch records buffer pointer in 'struct pmu_hw_events' which can be used to capture branch records during PMU interrupt. This percpu pointer here needs to be allocated first before usage. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Tested-by: James Clark <james.clark@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> --- include/linux/perf/arm_pmu.h | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/include/linux/perf/arm_pmu.h b/include/linux/perf/arm_pmu.h index 5ecd3d0e7645..2dd5bcd3080d 100644 --- a/include/linux/perf/arm_pmu.h +++ b/include/linux/perf/arm_pmu.h @@ -46,6 +46,13 @@ static_assert((PERF_EVENT_FLAG_ARCH & ARMPMU_EVT_63BIT) == ARMPMU_EVT_63BIT); }, \ } +#define MAX_BRANCH_RECORDS 64 + +struct branch_records { + struct perf_branch_stack branch_stack; + struct perf_branch_entry branch_entries[MAX_BRANCH_RECORDS]; +}; + /* The events for a given PMU register set. */ struct pmu_hw_events { /* @@ -72,6 +79,8 @@ struct pmu_hw_events { struct arm_pmu *percpu_pmu; int irq; + + struct branch_records *branches; }; enum armpmu_attr_groups {