Message ID | 20230710101705.154119-2-j-choudhary@ti.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id dt6-20020a17090afa4600b0024e2afd72a3si7110817pjb.182.2023.07.10.03.52.14; Mon, 10 Jul 2023 03:52:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=OC6Tac6p; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233258AbjGJKRg (ORCPT <rfc822;tebrre53rla2o@gmail.com> + 99 others); Mon, 10 Jul 2023 06:17:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56956 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233405AbjGJKRV (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 10 Jul 2023 06:17:21 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 130CEE51; Mon, 10 Jul 2023 03:17:16 -0700 (PDT) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 36AAH802002434; Mon, 10 Jul 2023 05:17:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1688984228; bh=afIalA/2EGLrZ+whpFAV6RbJAZmGQFimwb42DU5j1xk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=OC6Tac6pTNWK/R6qHTL8S/yK5WnedxQRVlcccHCJGTjYUl9rJkyCfLeHI77s95a95 X2Myfl810JQiODUOC0pU8uQEoyMV7MuqCfkax+9Da1ABscEoMhIVciPVCCKH9aZaFh Nrx0TnfooOCu+GW/+JWYJ5SWgyC9xs6a0ByP23mI= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 36AAH8kv018488 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 10 Jul 2023 05:17:08 -0500 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Mon, 10 Jul 2023 05:17:07 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Mon, 10 Jul 2023 05:17:07 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 36AAH7mY126100; Mon, 10 Jul 2023 05:17:07 -0500 From: Jayesh Choudhary <j-choudhary@ti.com> To: <nm@ti.com>, <vigneshr@ti.com> CC: <krzysztof.kozlowski+dt@linaro.org>, <afd@ti.com>, <s-vadapalli@ti.com>, <kristo@kernel.org>, <robh+dt@kernel.org>, <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <j-choudhary@ti.com> Subject: [PATCH v5 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux Date: Mon, 10 Jul 2023 15:47:01 +0530 Message-ID: <20230710101705.154119-2-j-choudhary@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230710101705.154119-1-j-choudhary@ti.com> References: <20230710101705.154119-1-j-choudhary@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1771030547832065931 X-GMAIL-MSGID: 1771030547832065931 |
Series |
Add peripherals for J784S4
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Commit Message
Jayesh Choudhary
July 10, 2023, 10:17 a.m. UTC
From: Siddharth Vadapalli <s-vadapalli@ti.com> The system controller node manages the CTRL_MMR0 region. Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> [j-choudhary@ti.com: Add reg property to fix dtc warning] Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> --- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+)
Comments
On 10/07/2023 12:17, Jayesh Choudhary wrote: > From: Siddharth Vadapalli <s-vadapalli@ti.com> > > The system controller node manages the CTRL_MMR0 region. > Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux. > > Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> > [j-choudhary@ti.com: Add reg property to fix dtc warning] > Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> > --- > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > index 2ea0adae6832..68cc2fa053e7 100644 > --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > @@ -5,6 +5,9 @@ > * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ > */ > > +#include <dt-bindings/mux/mux.h> > +#include <dt-bindings/mux/ti-serdes.h> Why? What do you use from that binding? Best regards, Krzysztof
On 10/07/23 17:13, Krzysztof Kozlowski wrote: > On 10/07/2023 12:17, Jayesh Choudhary wrote: >> From: Siddharth Vadapalli <s-vadapalli@ti.com> >> >> The system controller node manages the CTRL_MMR0 region. >> Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux. >> >> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> >> [j-choudhary@ti.com: Add reg property to fix dtc warning] >> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> >> --- >> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++ >> 1 file changed, 23 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >> index 2ea0adae6832..68cc2fa053e7 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >> @@ -5,6 +5,9 @@ >> * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ >> */ >> >> +#include <dt-bindings/mux/mux.h> >> +#include <dt-bindings/mux/ti-serdes.h> > > Why? What do you use from that binding? > Missed idle-state in the mux-controller node here for default values. I will wait for more feedback and then re-spin the series. Thanks, -Jayesh
On 12:01-20230711, Jayesh Choudhary wrote: > > > On 10/07/23 17:13, Krzysztof Kozlowski wrote: > > On 10/07/2023 12:17, Jayesh Choudhary wrote: > > > From: Siddharth Vadapalli <s-vadapalli@ti.com> > > > > > > The system controller node manages the CTRL_MMR0 region. > > > Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux. > > > > > > Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> > > > [j-choudhary@ti.com: Add reg property to fix dtc warning] > > > Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> > > > --- > > > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++ > > > 1 file changed, 23 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > > > index 2ea0adae6832..68cc2fa053e7 100644 > > > --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > > > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > > > @@ -5,6 +5,9 @@ > > > * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ > > > */ > > > +#include <dt-bindings/mux/mux.h> > > > +#include <dt-bindings/mux/ti-serdes.h> > > > > Why? What do you use from that binding? > > > > Missed idle-state in the mux-controller node here for default values. > I will wait for more feedback and then re-spin the series. btw, I am wondering if ti-serdes.h should even exist in dt-bindings - are any of the macros used in the driver? or should this follow the pinctrl style macros that could happily reside in arch/arm64/boot/dts/ti ?
On 11/07/2023 17:31, Nishanth Menon wrote: > On 12:01-20230711, Jayesh Choudhary wrote: >> >> >> On 10/07/23 17:13, Krzysztof Kozlowski wrote: >>> On 10/07/2023 12:17, Jayesh Choudhary wrote: >>>> From: Siddharth Vadapalli <s-vadapalli@ti.com> >>>> >>>> The system controller node manages the CTRL_MMR0 region. >>>> Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux. >>>> >>>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> >>>> [j-choudhary@ti.com: Add reg property to fix dtc warning] >>>> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> >>>> --- >>>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++ >>>> 1 file changed, 23 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >>>> index 2ea0adae6832..68cc2fa053e7 100644 >>>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >>>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >>>> @@ -5,6 +5,9 @@ >>>> * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ >>>> */ >>>> +#include <dt-bindings/mux/mux.h> >>>> +#include <dt-bindings/mux/ti-serdes.h> >>> >>> Why? What do you use from that binding? >>> >> >> Missed idle-state in the mux-controller node here for default values. >> I will wait for more feedback and then re-spin the series. > > btw, I am wondering if ti-serdes.h should even exist in dt-bindings - > are any of the macros used in the driver? or should this follow the > pinctrl style macros that could happily reside in arch/arm64/boot/dts/ti > ? I don't see any usage in drivers, which is a clear indication that it might not be suitable for bindings. What are these values? Look like some register values, which there is little sense in making a binding. Best regards, Krzysztof
On 12/07/2023 08:44, Krzysztof Kozlowski wrote: > On 11/07/2023 17:31, Nishanth Menon wrote: >> On 12:01-20230711, Jayesh Choudhary wrote: >>> >>> >>> On 10/07/23 17:13, Krzysztof Kozlowski wrote: >>>> On 10/07/2023 12:17, Jayesh Choudhary wrote: >>>>> From: Siddharth Vadapalli <s-vadapalli@ti.com> >>>>> >>>>> The system controller node manages the CTRL_MMR0 region. >>>>> Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux. >>>>> >>>>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> >>>>> [j-choudhary@ti.com: Add reg property to fix dtc warning] >>>>> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> >>>>> --- >>>>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++ >>>>> 1 file changed, 23 insertions(+) >>>>> >>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >>>>> index 2ea0adae6832..68cc2fa053e7 100644 >>>>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >>>>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >>>>> @@ -5,6 +5,9 @@ >>>>> * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ >>>>> */ >>>>> +#include <dt-bindings/mux/mux.h> >>>>> +#include <dt-bindings/mux/ti-serdes.h> >>>> >>>> Why? What do you use from that binding? >>>> >>> >>> Missed idle-state in the mux-controller node here for default values. >>> I will wait for more feedback and then re-spin the series. >> >> btw, I am wondering if ti-serdes.h should even exist in dt-bindings - >> are any of the macros used in the driver? or should this follow the >> pinctrl style macros that could happily reside in arch/arm64/boot/dts/ti >> ? > > I don't see any usage in drivers, which is a clear indication that it > might not be suitable for bindings. What are these values? Look like > some register values, which there is little sense in making a binding. > > Best regards, > Krzysztof > > You are right. They are constants not used in the driver directly. mmio-mux driver uses it to set the idle state of the mux via the 'idle-states' property. I agree with Nishanth that they should be moved to arch/arm64/boot/dts/ti
On 12/07/23 16:51, Roger Quadros wrote: > > > On 12/07/2023 08:44, Krzysztof Kozlowski wrote: >> On 11/07/2023 17:31, Nishanth Menon wrote: >>> On 12:01-20230711, Jayesh Choudhary wrote: >>>> >>>> >>>> On 10/07/23 17:13, Krzysztof Kozlowski wrote: >>>>> On 10/07/2023 12:17, Jayesh Choudhary wrote: >>>>>> From: Siddharth Vadapalli <s-vadapalli@ti.com> >>>>>> >>>>>> The system controller node manages the CTRL_MMR0 region. >>>>>> Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux. >>>>>> >>>>>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> >>>>>> [j-choudhary@ti.com: Add reg property to fix dtc warning] >>>>>> Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> >>>>>> --- >>>>>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 23 ++++++++++++++++++++++ >>>>>> 1 file changed, 23 insertions(+) >>>>>> >>>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >>>>>> index 2ea0adae6832..68cc2fa053e7 100644 >>>>>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >>>>>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi >>>>>> @@ -5,6 +5,9 @@ >>>>>> * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ >>>>>> */ >>>>>> +#include <dt-bindings/mux/mux.h> >>>>>> +#include <dt-bindings/mux/ti-serdes.h> >>>>> >>>>> Why? What do you use from that binding? >>>>> >>>> >>>> Missed idle-state in the mux-controller node here for default values. >>>> I will wait for more feedback and then re-spin the series. >>> >>> btw, I am wondering if ti-serdes.h should even exist in dt-bindings - >>> are any of the macros used in the driver? or should this follow the >>> pinctrl style macros that could happily reside in arch/arm64/boot/dts/ti >>> ? >> >> I don't see any usage in drivers, which is a clear indication that it >> might not be suitable for bindings. What are these values? Look like >> some register values, which there is little sense in making a binding. >> >> Best regards, >> Krzysztof >> >> > > You are right. They are constants not used in the driver directly. > mmio-mux driver uses it to set the idle state of the mux via the > 'idle-states' property. > > I agree with Nishanth that they should be moved to arch/arm64/boot/dts/ti > Then I will do the cleanup for all platforms and then post the dependent series before spinning v6. Thanks and Warm regards, -Jayesh
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index 2ea0adae6832..68cc2fa053e7 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -5,6 +5,9 @@ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ */ +#include <dt-bindings/mux/mux.h> +#include <dt-bindings/mux/ti-serdes.h> + &cbass_main { msmc_ram: sram@70000000 { compatible = "mmio-sram"; @@ -26,6 +29,26 @@ l3cache-sram@200000 { }; }; + scm_conf: syscon@100000 { + compatible = "ti,j721e-system-controller", "syscon", "simple-mfd"; + reg = <0x00 0x00100000 0x00 0x1c000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00 0x00 0x00100000 0x1c000>; + + serdes_ln_ctrl: mux-controller@4080 { + compatible = "mmio-mux"; + reg = <0x00004080 0x30>; + #mux-control-cells = <1>; + mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ + <0x4088 0x3>, <0x408c 0x3>, /* SERDES0 lane2/3 select */ + <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */ + <0x4098 0x3>, <0x409c 0x3>, /* SERDES1 lane2/3 select */ + <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */ + <0x40a8 0x3>, <0x40ac 0x3>; /* SERDES2 lane2/3 select */ + }; + }; + gic500: interrupt-controller@1800000 { compatible = "arm,gic-v3"; #address-cells = <2>;