diff mbox series

ARM64: dts: freescale: Fix VPU G2 clock

Message ID 20230707094200.47119-1-benjamin.gaignard@collabora.com
State New
Headers
Series ARM64: dts: freescale: Fix VPU G2 clock |

Commit Message

Benjamin Gaignard July 7, 2023, 9:42 a.m. UTC 
  Set VPU G2 clock to 300MHz like described in documentation.
This fix pixels error occurring with large resolution ( >= 2560x1600)
HEVC test stream when using the postprocessor to produce NV12.

Fixes: 4ac7e4a81272 ("arm64: dts: imx8mq: Enable both G1 and G2 VPU's with vpu-blk-ctrl")
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Shawn Guo July 18, 2023, 7:06 a.m. UTC | #1 
On Fri, Jul 07, 2023 at 12:08:34PM +0200, Markus Elfring wrote:
> > Set VPU G2 clock to 300MHz like described in documentation.
> > This fix pixels error …
> 
> Would you like to avoid typos in such a change description?

I assume you are suggesting s/fix/fixes?  I can fix it up when applying.
Thanks!

Shawn
Shawn Guo July 18, 2023, 7:08 a.m. UTC | #2 
On Fri, Jul 07, 2023 at 11:42:00AM +0200, Benjamin Gaignard wrote:
> Set VPU G2 clock to 300MHz like described in documentation.
> This fix pixels error occurring with large resolution ( >= 2560x1600)
> HEVC test stream when using the postprocessor to produce NV12.
> 
> Fixes: 4ac7e4a81272 ("arm64: dts: imx8mq: Enable both G1 and G2 VPU's with vpu-blk-ctrl")
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>

We use prefix "arm64: dts: ..." for arm64 DTS changes.  I fixed it up
and applied the patch.

Shawn
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 0492556a10db..345c70c6c697 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -770,7 +770,7 @@  pgc_vpu: power-domain@6 {
 									 <&clk IMX8MQ_SYS1_PLL_800M>,
 									 <&clk IMX8MQ_VPU_PLL>;
 						assigned-clock-rates = <600000000>,
-								       <600000000>,
+								       <300000000>,
 								       <800000000>,
 								       <0>;
 					};