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[2620:137:e000::1:20]) by mx.google.com with ESMTP id k28-20020a635a5c000000b0055b618c77efsi2642146pgm.179.2023.07.06.18.37.45; Thu, 06 Jul 2023 18:38:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=iMkOG0cd; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231906AbjGGBfK (ORCPT + 99 others); Thu, 6 Jul 2023 21:35:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231895AbjGGBfG (ORCPT ); Thu, 6 Jul 2023 21:35:06 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 304861BF4 for ; Thu, 6 Jul 2023 18:35:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1688693705; x=1720229705; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=M4yHvqOjBvNXxYpbH9KMyRDRPz6GZ0HRmaDFz16Hw8M=; b=iMkOG0cdzZxE0YBkisSQc6MRTRxq0LRfWcof/ixYu60hOto1Bwe3W/Hb Pj3sc+yg1WFOAKuuK6OnbRJjDakz5gSjf/XPkaiCp6Qtp7cpG2TeuoPhN TjHK065Tj+v4MWyByoRtvpbuGl5Yz3rW5293mNbKYQxMZtIihuEjmkYJD qZ2Oo9vbTaP3A/6g7xOTiJvuVAEWfCR+GWgJ5pc5BRy27nMrQj1eEBNd9 xYVU/D5pv5/WgPYIzhSABOz1BYBI1riarm0/msESLCNa8tcDaP27k1NDs cqXxNwADiaqph9GAU26cHcJdrpvFmG6ynd/8x8IpLAb19yiqxVD7GufYZ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10763"; a="429832259" X-IronPort-AV: E=Sophos;i="6.01,187,1684825200"; d="scan'208";a="429832259" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2023 18:35:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10763"; a="893791308" X-IronPort-AV: E=Sophos;i="6.01,187,1684825200"; d="scan'208";a="893791308" Received: from fengj-mobl.ccr.corp.intel.com (HELO tinazhan-desk1.www.tendawifi.com) ([10.254.210.124]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2023 18:35:01 -0700 From: Tina Zhang To: Jason Gunthorpe , Kevin Tian , Joerg Roedel , Will Deacon , Lu Baolu , Michael Shavit Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Tina Zhang Subject: [RFC PATCH 2/6] iommu: Call helper functions to get/set assigned pasid value Date: Fri, 7 Jul 2023 09:34:37 +0800 Message-Id: <20230707013441.365583-3-tina.zhang@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230707013441.365583-1-tina.zhang@intel.com> References: <20230707013441.365583-1-tina.zhang@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1770723874811008648?= X-GMAIL-MSGID: =?utf-8?q?1770723874811008648?= Use the helper function mm_get_pasid() to get the mm assigned pasid value and mm_set_pasid() to set the mm assigned pasid value. Signed-off-by: Tina Zhang --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 12 ++++++------ drivers/iommu/intel/svm.c | 8 ++++---- drivers/iommu/iommu-sva.c | 16 ++++++++-------- 3 files changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index a5a63b1c947eb..0b455654d3650 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -204,7 +204,7 @@ static void arm_smmu_mm_invalidate_range(struct mmu_notifier *mn, if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_BTM)) arm_smmu_tlb_inv_range_asid(start, size, smmu_mn->cd->asid, PAGE_SIZE, false, smmu_domain); - arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, start, size); + arm_smmu_atc_inv_domain(smmu_domain, mm_get_pasid(mm), start, size); } static void arm_smmu_mm_release(struct mmu_notifier *mn, struct mm_struct *mm) @@ -222,10 +222,10 @@ static void arm_smmu_mm_release(struct mmu_notifier *mn, struct mm_struct *mm) * DMA may still be running. Keep the cd valid to avoid C_BAD_CD events, * but disable translation. */ - arm_smmu_write_ctx_desc(smmu_domain, mm->pasid, &quiet_cd); + arm_smmu_write_ctx_desc(smmu_domain, mm_get_pasid(mm), &quiet_cd); arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_mn->cd->asid); - arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, 0, 0); + arm_smmu_atc_inv_domain(smmu_domain, mm_get_pasid(mm), 0, 0); smmu_mn->cleared = true; mutex_unlock(&sva_lock); @@ -279,7 +279,7 @@ arm_smmu_mmu_notifier_get(struct arm_smmu_domain *smmu_domain, goto err_free_cd; } - ret = arm_smmu_write_ctx_desc(smmu_domain, mm->pasid, cd); + ret = arm_smmu_write_ctx_desc(smmu_domain, mm_get_pasid(mm), cd); if (ret) goto err_put_notifier; @@ -304,7 +304,7 @@ static void arm_smmu_mmu_notifier_put(struct arm_smmu_mmu_notifier *smmu_mn) return; list_del(&smmu_mn->list); - arm_smmu_write_ctx_desc(smmu_domain, mm->pasid, NULL); + arm_smmu_write_ctx_desc(smmu_domain, mm_get_pasid(mm), NULL); /* * If we went through clear(), we've already invalidated, and no @@ -312,7 +312,7 @@ static void arm_smmu_mmu_notifier_put(struct arm_smmu_mmu_notifier *smmu_mn) */ if (!smmu_mn->cleared) { arm_smmu_tlb_inv_asid(smmu_domain->smmu, cd->asid); - arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, 0, 0); + arm_smmu_atc_inv_domain(smmu_domain, mm_get_pasid(mm), 0, 0); } /* Frees smmu_mn */ diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index e95b339e9cdc0..e6377cff6a935 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -306,13 +306,13 @@ static int intel_svm_bind_mm(struct intel_iommu *iommu, struct device *dev, unsigned long sflags; int ret = 0; - svm = pasid_private_find(mm->pasid); + svm = pasid_private_find(mm_get_pasid(mm)); if (!svm) { svm = kzalloc(sizeof(*svm), GFP_KERNEL); if (!svm) return -ENOMEM; - svm->pasid = mm->pasid; + svm->pasid = mm_get_pasid(mm); svm->mm = mm; INIT_LIST_HEAD_RCU(&svm->devs); @@ -350,7 +350,7 @@ static int intel_svm_bind_mm(struct intel_iommu *iommu, struct device *dev, /* Setup the pasid table: */ sflags = cpu_feature_enabled(X86_FEATURE_LA57) ? PASID_FLAG_FL5LP : 0; - ret = intel_pasid_setup_first_level(iommu, dev, mm->pgd, mm->pasid, + ret = intel_pasid_setup_first_level(iommu, dev, mm->pgd, mm_get_pasid(mm), FLPT_DEFAULT_DID, sflags); if (ret) goto free_sdev; @@ -364,7 +364,7 @@ static int intel_svm_bind_mm(struct intel_iommu *iommu, struct device *dev, free_svm: if (list_empty(&svm->devs)) { mmu_notifier_unregister(&svm->notifier, mm); - pasid_private_remove(mm->pasid); + pasid_private_remove(mm_get_pasid(mm)); kfree(svm); } diff --git a/drivers/iommu/iommu-sva.c b/drivers/iommu/iommu-sva.c index 9821bc44f5ac1..7a41b6510e385 100644 --- a/drivers/iommu/iommu-sva.c +++ b/drivers/iommu/iommu-sva.c @@ -28,7 +28,7 @@ static int iommu_sva_alloc_pasid(struct mm_struct *mm, ioasid_t min, ioasid_t ma mutex_lock(&iommu_sva_lock); /* Is a PASID already associated with this mm? */ if (mm_valid_pasid(mm)) { - if (mm->pasid < min || mm->pasid > max) + if (mm_get_pasid(mm) < min || mm_get_pasid(mm) > max) ret = -EOVERFLOW; goto out; } @@ -36,7 +36,7 @@ static int iommu_sva_alloc_pasid(struct mm_struct *mm, ioasid_t min, ioasid_t ma ret = ida_alloc_range(&iommu_global_pasid_ida, min, max, GFP_KERNEL); if (ret < min) goto out; - mm->pasid = ret; + mm_set_pasid(mm, ret); ret = 0; out: mutex_unlock(&iommu_sva_lock); @@ -70,7 +70,7 @@ struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm if (!max_pasids) return ERR_PTR(-EOPNOTSUPP); - /* Allocate mm->pasid if necessary. */ + /* Allocate pasid if necessary. */ ret = iommu_sva_alloc_pasid(mm, 1, max_pasids - 1); if (ret) return ERR_PTR(ret); @@ -81,7 +81,7 @@ struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm mutex_lock(&iommu_sva_lock); /* Search for an existing domain. */ - domain = iommu_get_domain_for_dev_pasid(dev, mm->pasid, + domain = iommu_get_domain_for_dev_pasid(dev, mm_get_pasid(mm), IOMMU_DOMAIN_SVA); if (IS_ERR(domain)) { ret = PTR_ERR(domain); @@ -100,7 +100,7 @@ struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm goto out_unlock; } - ret = iommu_attach_device_pasid(domain, dev, mm->pasid); + ret = iommu_attach_device_pasid(domain, dev, mm_get_pasid(mm)); if (ret) goto out_free_domain; domain->users = 1; @@ -132,7 +132,7 @@ EXPORT_SYMBOL_GPL(iommu_sva_bind_device); void iommu_sva_unbind_device(struct iommu_sva *handle) { struct iommu_domain *domain = handle->domain; - ioasid_t pasid = domain->mm->pasid; + ioasid_t pasid = mm_get_pasid(domain->mm); struct device *dev = handle->dev; mutex_lock(&iommu_sva_lock); @@ -149,7 +149,7 @@ u32 iommu_sva_get_pasid(struct iommu_sva *handle) { struct iommu_domain *domain = handle->domain; - return domain->mm->pasid; + return mm_get_pasid(domain->mm); } EXPORT_SYMBOL_GPL(iommu_sva_get_pasid); @@ -216,5 +216,5 @@ void mm_pasid_drop(struct mm_struct *mm) if (likely(!mm_valid_pasid(mm))) return; - ida_free(&iommu_global_pasid_ida, mm->pasid); + ida_free(&iommu_global_pasid_ida, mm_get_pasid(mm)); }